Message ID | 1329494481-8134-1-git-send-email-twarren@nvidia.com |
---|---|
State | Accepted |
Commit | d8bd820935bb9b8bf2717a259eeab4376e9ccc9a |
Headers | show |
On Fri, Feb 17, 2012 at 9:01 AM, Tom Warren <twarren.nvidia@gmail.com> wrote: > The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP > load using a constant in tegra2_start. Change it to use a load > thru another reg using mov sp, %0 : : "r"(CONST). > > Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also > compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK. > > Signed-off-by: Tom Warren <twarren@nvidia.com> > --- > V2: Change 4 mov/orr's to single mov sp as per Marek Vasut > > arch/arm/cpu/armv7/tegra2/ap20.c | 10 +++++----- > 1 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c > index 4c44bb3..f0450f4 100644 > --- a/arch/arm/cpu/armv7/tegra2/ap20.c > +++ b/arch/arm/cpu/armv7/tegra2/ap20.c > @@ -298,11 +298,11 @@ void tegra2_start(void) > writel(0xC0, &pmt->pmt_cfg_ctl); > > /* > - * If we are ARM7 - give it a different stack. We are about to > - * start up the A9 which will want to use this one. > - */ > - asm volatile("ldr sp, =%c0\n" > - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT)); > + * If we are ARM7 - give it a different stack. We are about to > + * start up the A9 which will want to use this one. > + */ > + asm volatile("mov sp, %0\n" > + : : "r"(AVP_EARLY_BOOT_STACK_LIMIT)); > > start_cpu((u32)_start); > halt_avp(); > -- > 1.7.7.1 > Ack? Nak? Can I get some love here? Albert/Wolfgang - did anyone try this to ensure that it really fixes the 6 Tegra2 failures? Tom
On Thu, Feb 23, 2012 at 1:25 PM, Tom Warren <twarren.nvidia@gmail.com> wrote: > On Fri, Feb 17, 2012 at 9:01 AM, Tom Warren <twarren.nvidia@gmail.com> wrote: >> The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP >> load using a constant in tegra2_start. Change it to use a load >> thru another reg using mov sp, %0 : : "r"(CONST). >> >> Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also >> compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK. >> >> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested on gcc 4.6, sorry I don't have the compiler that fails. Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> >> --- >> V2: Change 4 mov/orr's to single mov sp as per Marek Vasut >> >> arch/arm/cpu/armv7/tegra2/ap20.c | 10 +++++----- >> 1 files changed, 5 insertions(+), 5 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c >> index 4c44bb3..f0450f4 100644 >> --- a/arch/arm/cpu/armv7/tegra2/ap20.c >> +++ b/arch/arm/cpu/armv7/tegra2/ap20.c >> @@ -298,11 +298,11 @@ void tegra2_start(void) >> writel(0xC0, &pmt->pmt_cfg_ctl); >> >> /* >> - * If we are ARM7 - give it a different stack. We are about to >> - * start up the A9 which will want to use this one. >> - */ >> - asm volatile("ldr sp, =%c0\n" >> - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT)); >> + * If we are ARM7 - give it a different stack. We are about to >> + * start up the A9 which will want to use this one. >> + */ >> + asm volatile("mov sp, %0\n" >> + : : "r"(AVP_EARLY_BOOT_STACK_LIMIT)); >> >> start_cpu((u32)_start); >> halt_avp(); >> -- >> 1.7.7.1 >> > > Ack? Nak? Can I get some love here? > > Albert/Wolfgang - did anyone try this to ensure that it really fixes > the 6 Tegra2 failures? > > Tom > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c index 4c44bb3..f0450f4 100644 --- a/arch/arm/cpu/armv7/tegra2/ap20.c +++ b/arch/arm/cpu/armv7/tegra2/ap20.c @@ -298,11 +298,11 @@ void tegra2_start(void) writel(0xC0, &pmt->pmt_cfg_ctl); /* - * If we are ARM7 - give it a different stack. We are about to - * start up the A9 which will want to use this one. - */ - asm volatile("ldr sp, =%c0\n" - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT)); + * If we are ARM7 - give it a different stack. We are about to + * start up the A9 which will want to use this one. + */ + asm volatile("mov sp, %0\n" + : : "r"(AVP_EARLY_BOOT_STACK_LIMIT)); start_cpu((u32)_start); halt_avp();
The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP load using a constant in tegra2_start. Change it to use a load thru another reg using mov sp, %0 : : "r"(CONST). Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK. Signed-off-by: Tom Warren <twarren@nvidia.com> --- V2: Change 4 mov/orr's to single mov sp as per Marek Vasut arch/arm/cpu/armv7/tegra2/ap20.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-)