powerpc/usb: fix issue of CPU halt when missing USB PHY clock

when missing USB PHY clock, kernel booting up will halt during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hang in this case.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
 drivers/usb/host/ehci-fsl.c |   11 +++++++++--
 drivers/usb/host/ehci-fsl.h |    1 +
 2 files changed, 10 insertions(+), 2 deletions(-)

On 2/1/2012 2:50 PM, Shengzhou Liu wrote:
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index b556a72..834237e 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
>  	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
>  }
>  
> -static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
> +static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
>  {
>  	struct usb_hcd *hcd = ehci_to_hcd(ehci);
>  	struct fsl_usb2_platform_data *pdata;
> @@ -299,12 +299,19 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
>  #endif
>  		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
>  	}
> +
> +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {
> +		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> +		return -1;

Please return a proper error code. -ENODEV ?

> +	}
> +	return 0;
>  }
>

> -----Original Message-----
> From: Pavan Kondeti [mailto:pkondeti@codeaurora.org]
> Sent: Wednesday, February 01, 2012 6:11 PM
> To: Liu Shengzhou-B36685
> Cc: linux-usb@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] powerpc/usb: fix issue of CPU halt when missing
> USB PHY clock
> 
> On 2/1/2012 2:50 PM, Shengzhou Liu wrote:
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-
> fsl.c
> > index b556a72..834237e 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd
> *ehci,
> >  	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
> >  }
> >
> > -static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
> > +static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
> >  {
> >  	struct usb_hcd *hcd = ehci_to_hcd(ehci);
> >  	struct fsl_usb2_platform_data *pdata; @@ -299,12 +299,19 @@
> static
> > void ehci_fsl_usb_setup(struct ehci_hcd *ehci)  #endif
> >  		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
> >  	}
> > +
> > +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID))
> {
> > +		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> > +		return -1;
> 
> Please return a proper error code. -ENODEV ?

[Shengzhou] Ok, updated in v2, thanks.
> 
> > +	}
> > +	return 0;
> >  }
> >
> --
> Sent by a consultant of the Qualcomm Innovation Center, Inc.
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> Forum.

> > > +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID))
> > {
> > > +		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> > > +		return -1;
> > 
> > Please return a proper error code. -ENODEV ?
> 
> [Shengzhou] Ok, updated in v2, thanks.
> >

Note that I just got a p5020ds from FSL, and with it's default
configuration, when I build & boot current upstream with FSL USB
support (64-bit kernel) it hangs when initializing USB.

With or without this patch.

It complains about invalid dr-mode (there's two USB nodes in the .dts
coming from uboot, an "mph" and "dr", the former has no dr-mode property
in the device-tree.

Is the current kernel incompatible with old device-tree's ? (that would
be a shame...)

Cheers,
Ben.

> -----Original Message-----
> From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org]
> Sent: Wednesday, February 15, 2012 10:31 AM
> To: Liu Shengzhou-B36685
> Cc: Pavan Kondeti; linux-usb@vger.kernel.org; linuxppc-
> dev@lists.ozlabs.org
> Subject: RE: [PATCH] powerpc/usb: fix issue of CPU halt when missing
> USB PHY clock
> 
> 
> > > > +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
> > > > +CTRL_PHY_CLK_VALID))
> > > {
> > > > +		printk(KERN_WARNING "fsl-ehci: USB PHY clock
> invalid\n");
> > > > +		return -1;
> > >
> > > Please return a proper error code. -ENODEV ?
> >
> > [Shengzhou] Ok, updated in v2, thanks.
> > >
> 
> Note that I just got a p5020ds from FSL, and with it's default
> configuration, when I build & boot current upstream with FSL USB
> support (64-bit kernel) it hangs when initializing USB.
> 
> With or without this patch.
> 
> It complains about invalid dr-mode (there's two USB nodes in the .dts
> coming from uboot, an "mph" and "dr", the former has no dr-mode
> property in the device-tree.
> 
> Is the current kernel incompatible with old device-tree's ? (that would
> be a shame...)
> 
> Cheers,
> Ben.
> 
> 
Looks like there is a bug, please try to add the patch http://patchwork.ozlabs.org/patch/141558
-Shengzhou