| Message ID | 1327308641-14736-6-git-send-email-hpoussin@reactos.org |
|---|---|
| State | New |
| Headers | show |
Hervé Poussineau <hpoussin@reactos.org> writes: > DIR and CCR registers share the same address ; DIR is read-only > while CCR is write-only Looks like guest writes to CCR are silently ignored before this patch. Is that correct? Impact?
Markus Armbruster a écrit : > Hervé Poussineau <hpoussin@reactos.org> writes: > >> DIR and CCR registers share the same address ; DIR is read-only >> while CCR is write-only > > Looks like guest writes to CCR are silently ignored before this patch. > Is that correct? Yes. > Impact? CCR is only used to program media rate, which is not checked without this patchset. So, none for this patch.
Hervé Poussineau <hpoussin@reactos.org> writes: > Markus Armbruster a écrit : >> Hervé Poussineau <hpoussin@reactos.org> writes: >> >>> DIR and CCR registers share the same address ; DIR is read-only >>> while CCR is write-only >> >> Looks like guest writes to CCR are silently ignored before this patch. >> Is that correct? > > Yes. > >> Impact? > > CCR is only used to program media rate, which is not checked without > this patchset. > > So, none for this patch. Aha, it's just a prerequisite for the rest of the series. Makes sense. Explain in commit message?
Markus Armbruster a écrit : > Hervé Poussineau <hpoussin@reactos.org> writes: > >> Markus Armbruster a écrit : >>> Hervé Poussineau <hpoussin@reactos.org> writes: >>> >>>> DIR and CCR registers share the same address ; DIR is read-only >>>> while CCR is write-only >>> Looks like guest writes to CCR are silently ignored before this patch. >>> Is that correct? >> Yes. >> >>> Impact? >> CCR is only used to program media rate, which is not checked without >> this patchset. >> >> So, none for this patch. > > Aha, it's just a prerequisite for the rest of the series. Makes sense. > > Explain in commit message? > Will do when respinning the serie Hervé
diff --git a/hw/fdc.c b/hw/fdc.c index 4a363bd..4875291 100644 --- a/hw/fdc.c +++ b/hw/fdc.c @@ -224,6 +224,7 @@ static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value); static uint32_t fdctrl_read_data(FDCtrl *fdctrl); static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value); static uint32_t fdctrl_read_dir(FDCtrl *fdctrl); +static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value); enum { FD_DIR_WRITE = 0, @@ -248,6 +249,7 @@ enum { FD_REG_DSR = 0x04, FD_REG_FIFO = 0x05, FD_REG_DIR = 0x07, + FD_REG_CCR = 0x07, }; enum { @@ -491,6 +493,9 @@ static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value) case FD_REG_FIFO: fdctrl_write_data(fdctrl, value); break; + case FD_REG_CCR: + fdctrl_write_ccr(fdctrl, value); + break; default: break; } @@ -881,6 +886,23 @@ static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value) fdctrl->dsr = value; } +/* Configuration control register: 0x07 (write) */ +static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value) +{ + /* Reset mode */ + if (!(fdctrl->dor & FD_DOR_nRESET)) { + FLOPPY_DPRINTF("Floppy controller in RESET state !\n"); + return; + } + FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value); + + /* Only the rate selection bits used in AT mode, and we + * store those in the DSR. + */ + fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | + (value & FD_DSR_DRATEMASK); +} + static int fdctrl_media_changed(FDrive *drv) { int ret;
DIR and CCR registers share the same address ; DIR is read-only while CCR is write-only Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> --- hw/fdc.c | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-)