diff mbox series

[v4,36/57] tcg/loongarch64: Assert the host supports unaligned accesses

Message ID 20230503070656.1746170-37-richard.henderson@linaro.org
State New
Headers show
Series tcg: Improve atomicity support | expand

Commit Message

Richard Henderson May 3, 2023, 7:06 a.m. UTC
This should be true of all server class loongarch64.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/loongarch64/tcg-target.c.inc | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Peter Maydell May 5, 2023, 12:30 p.m. UTC | #1
On Wed, 3 May 2023 at 08:15, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This should be true of all server class loongarch64.

By this do you mean "anything that runs Linux" ?

If not, we should be a bit more user-friendly about bailing
out than just assert()ing. For the "tried to run on an
ARMv5" case we use error_report and exit:

            error_report("TCG: ARMv%d is unsupported; exiting", arm_arch);
            exit(EXIT_FAILURE);

thanks
-- PMM
WANG Xuerui May 5, 2023, 1:24 p.m. UTC | #2
Hi,

On 2023/5/3 15:06, Richard Henderson wrote:
> This should be true of all server class loongarch64.
And desktop-class (i.e. all Loongson-3 series).
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/loongarch64/tcg-target.c.inc | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
> index e651ec5c71..ccc13ffdb4 100644
> --- a/tcg/loongarch64/tcg-target.c.inc
> +++ b/tcg/loongarch64/tcg-target.c.inc
> @@ -30,6 +30,7 @@
>    */
>   
>   #include "../tcg-ldst.c.inc"
> +#include <asm/hwcap.h>
>   
>   #ifdef CONFIG_DEBUG_TCG
>   static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
> @@ -1674,6 +1675,11 @@ static void tcg_target_qemu_prologue(TCGContext *s)
>   
>   static void tcg_target_init(TCGContext *s)
>   {
> +    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
> +
> +    /* All server class loongarch have UAL; only embedded do not. */
> +    assert(hwcap & HWCAP_LOONGARCH_UAL);
> +
It is a bit worrying that a future SoC (the octa-core Loongson 2K3000) 
might get used for light desktop use cases (e.g. laptops) where QEMU is 
arguably relevant, but it's currently unclear whether its LA364 
micro-architecture will have UAL. The Loongson folks may have more to share.
>       tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS;
>       tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
>
Song Gao May 6, 2023, 2:03 a.m. UTC | #3
Hi,

在 2023/5/5 下午9:24, WANG Xuerui 写道:
> Hi,
>
> On 2023/5/3 15:06, Richard Henderson wrote:
>> This should be true of all server class loongarch64.
> And desktop-class (i.e. all Loongson-3 series).
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   tcg/loongarch64/tcg-target.c.inc | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/tcg/loongarch64/tcg-target.c.inc 
>> b/tcg/loongarch64/tcg-target.c.inc
>> index e651ec5c71..ccc13ffdb4 100644
>> --- a/tcg/loongarch64/tcg-target.c.inc
>> +++ b/tcg/loongarch64/tcg-target.c.inc
>> @@ -30,6 +30,7 @@
>>    */
>>     #include "../tcg-ldst.c.inc"
>> +#include <asm/hwcap.h>
>>     #ifdef CONFIG_DEBUG_TCG
>>   static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
>> @@ -1674,6 +1675,11 @@ static void 
>> tcg_target_qemu_prologue(TCGContext *s)
>>     static void tcg_target_init(TCGContext *s)
>>   {
>> +    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
>> +
>> +    /* All server class loongarch have UAL; only embedded do not. */
>> +    assert(hwcap & HWCAP_LOONGARCH_UAL);
>> +
> It is a bit worrying that a future SoC (the octa-core Loongson 2K3000) 
> might get used for light desktop use cases (e.g. laptops) where QEMU 
> is arguably relevant, but it's currently unclear whether its LA364 
> micro-architecture will have UAL. The Loongson folks may have more to 
> share.
'LA364' support UAL.

Thanks.
Song Gao
diff mbox series

Patch

diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index e651ec5c71..ccc13ffdb4 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -30,6 +30,7 @@ 
  */
 
 #include "../tcg-ldst.c.inc"
+#include <asm/hwcap.h>
 
 #ifdef CONFIG_DEBUG_TCG
 static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
@@ -1674,6 +1675,11 @@  static void tcg_target_qemu_prologue(TCGContext *s)
 
 static void tcg_target_init(TCGContext *s)
 {
+    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
+
+    /* All server class loongarch have UAL; only embedded do not. */
+    assert(hwcap & HWCAP_LOONGARCH_UAL);
+
     tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS;
     tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;