| Message ID | 20221123133652.465724-1-fabrice.gasnier@foss.st.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | pwm: stm32-lp: fix the check on arr and cmp registers update | expand |
On Wed, Nov 23, 2022 at 02:36:52PM +0100, Fabrice Gasnier wrote: > The ARR (auto reload register) and CMP (compare) registers are > successively written. The status bits to check the update of these > registers are polled together with regmap_read_poll_timeout(). > The condition to end the loop may become true, even if one of the > register isn't correctly updated. > So ensure both status bits are set before clearing them. > > Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver") > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Looks reasonable Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Best regards Uwe
On Wed, 23 Nov 2022 14:36:52 +0100, Fabrice Gasnier wrote: > The ARR (auto reload register) and CMP (compare) registers are > successively written. The status bits to check the update of these > registers are polled together with regmap_read_poll_timeout(). > The condition to end the loop may become true, even if one of the > register isn't correctly updated. > So ensure both status bits are set before clearing them. > > [...] Applied, thanks! [1/1] pwm: stm32-lp: fix the check on arr and cmp registers update commit: 3066bc2d58be31275afb51a589668f265e419c37 Best regards,
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 3115abb3f52a..61a1c87cd501 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -127,7 +127,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, /* ensure CMP & ARR registers are properly written */ ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, - (val & STM32_LPTIM_CMPOK_ARROK), + (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK, 100, 1000); if (ret) { dev_err(priv->chip.dev, "ARR/CMP registers write issue\n");
The ARR (auto reload register) and CMP (compare) registers are successively written. The status bits to check the update of these registers are polled together with regmap_read_poll_timeout(). The condition to end the loop may become true, even if one of the register isn't correctly updated. So ensure both status bits are set before clearing them. Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> --- drivers/pwm/pwm-stm32-lp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)