diff mbox

[1/5] stmmac: use mdelay on timeout of sw reset

Message ID 1321516682-32208-1-git-send-email-peppe.cavallaro@st.com
State Accepted, archived
Delegated to: David Miller
Headers show

Commit Message

Giuseppe CAVALLARO Nov. 17, 2011, 7:57 a.m. UTC 
From: Francesco Virlinzi <francesco.virlinzi@st.com>

This patch uses an mdelay to manage the timeout on
sw reset to be independant of cpu_clk.

Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com>
Reviewed-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
---
 .../net/ethernet/stmicro/stmmac/dwmac1000_dma.c    |    3 ++-
 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c |    3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

Comments

David Miller Nov. 17, 2011, 8:13 a.m. UTC | #1 
From: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
Date: Thu, 17 Nov 2011 08:57:58 +0100

> From: Francesco Virlinzi <francesco.virlinzi@st.com>
> 
> This patch uses an mdelay to manage the timeout on
> sw reset to be independant of cpu_clk.
> 
> Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com>
> Reviewed-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>

Applied.
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diff mbox

Patch

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index da66ac5..4d5402a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -39,10 +39,11 @@  static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
 	/* DMA SW reset */
 	value |= DMA_BUS_MODE_SFT_RESET;
 	writel(value, ioaddr + DMA_BUS_MODE);
-	limit = 15000;
+	limit = 10;
 	while (limit--) {
 		if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
 			break;
+		mdelay(10);
 	}
 	if (limit < 0)
 		return -EBUSY;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
index 627f656..bc17fd0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
@@ -41,10 +41,11 @@  static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
 	/* DMA SW reset */
 	value |= DMA_BUS_MODE_SFT_RESET;
 	writel(value, ioaddr + DMA_BUS_MODE);
-	limit = 15000;
+	limit = 10;
 	while (limit--) {
 		if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
 			break;
+		mdelay(10);
 	}
 	if (limit < 0)
 		return -EBUSY;