| Message ID | 1320921120-11574-6-git-send-email-andreas.faerber@web.de |
|---|---|
| State | New |
| Headers | show |
On 10 November 2011 10:32, Andreas Färber <andreas.faerber@web.de> wrote: > + { > + static const struct { > + uint8_t r; > + uint8_t p; > + uint8_t value; > + } fpsid_revs[] = { > + { 1, 0, 0x3 }, > + { 1, 1, 0x4 }, > + { 1, 2, 0x6 }, > + { 1, 3, 0x7 }, > + { 1, 4, 0x8 }, > + {} > + }; > + uint8_t r = (ARM_CPUID(env) >> 20) & 0xf; > + uint8_t p = ARM_CPUID(env) & 0xf; > + uint8_t rev = 0; > + int i; > + set_feature(env, ARM_FEATURE_VFP); > + set_feature(env, ARM_FEATURE_VFP3); > + /* TODO VFPv3-D16 */ > + /* Calculate FPSID value matching to MIDR */ > + for (i = 0; fpsid_revs[i].r != 0; i++) { > + if (fpsid_revs[i].r == r && fpsid_revs[i].p == p) { > + rev = fpsid_revs[i].value; > + break; > + } > + } > + if (rev == 0) { > + cpu_abort(env, > + "Cortex-R4F r%" PRIu8 "p%" PRIu8 " unsupported", > + r, p); > + } > + env->vfp.xregs[ARM_VFP_FPSID] = 0x41023140 | (rev & 0xf); > + } This seems a bit "beyond the call of duty" since we don't try to do it for any other CPUs. I would just set the FPSID to a fixed value... -- PMM
diff --git a/target-arm/helper.c b/target-arm/helper.c index 4836762..15853e0 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -181,6 +181,40 @@ static void cpu_reset_model_id(CPUARMState *env) set_feature(env, ARM_FEATURE_THUMB2); set_feature(env, ARM_FEATURE_THUMB_DIV); set_feature(env, ARM_FEATURE_MPU); + { + static const struct { + uint8_t r; + uint8_t p; + uint8_t value; + } fpsid_revs[] = { + { 1, 0, 0x3 }, + { 1, 1, 0x4 }, + { 1, 2, 0x6 }, + { 1, 3, 0x7 }, + { 1, 4, 0x8 }, + {} + }; + uint8_t r = (ARM_CPUID(env) >> 20) & 0xf; + uint8_t p = ARM_CPUID(env) & 0xf; + uint8_t rev = 0; + int i; + set_feature(env, ARM_FEATURE_VFP); + set_feature(env, ARM_FEATURE_VFP3); + /* TODO VFPv3-D16 */ + /* Calculate FPSID value matching to MIDR */ + for (i = 0; fpsid_revs[i].r != 0; i++) { + if (fpsid_revs[i].r == r && fpsid_revs[i].p == p) { + rev = fpsid_revs[i].value; + break; + } + } + if (rev == 0) { + cpu_abort(env, + "Cortex-R4F r%" PRIu8 "p%" PRIu8 " unsupported", + r, p); + } + env->vfp.xregs[ARM_VFP_FPSID] = 0x41023140 | (rev & 0xf); + } memcpy(env->cp15.c0_c1, cortexr4_cp15_c0_c1, 8 * sizeof(uint32_t)); memcpy(env->cp15.c0_c2, cortexr4_cp15_c0_c2, 8 * sizeof(uint32_t)); break;
Since no clean distinction between R4 and R4F can be made yet, default -cpu cortex-r4 to Cortex-R4F. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- target-arm/helper.c | 34 ++++++++++++++++++++++++++++++++++ 1 files changed, 34 insertions(+), 0 deletions(-)