diff mbox

[U-Boot,3/4] mx31: Use proper IO accessor for GPR register

Message ID 1320848103-19495-3-git-send-email-fabio.estevam@freescale.com
State Accepted
Commit ce93dc9bce15434989e01a6fc6d0124a8416b25d
Delegated to: Stefano Babic
Headers show

Commit Message

Fabio Estevam Nov. 9, 2011, 2:15 p.m. UTC
Use proper IO accessor for GPR register.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
 arch/arm/cpu/arm1136/mx31/generic.c       |    5 +++--
 arch/arm/include/asm/arch-mx31/imx-regs.h |    7 ++++++-
 2 files changed, 9 insertions(+), 3 deletions(-)

Comments

Stefano Babic Nov. 10, 2011, 1:20 p.m. UTC | #1
On 11/09/2011 03:15 PM, Fabio Estevam wrote:
> Use proper IO accessor for GPR register.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---

Acked-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 1621e9e..167e97a 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -144,14 +144,15 @@  void mx31_set_pad(enum iomux_pins pin, u32 config)
 void mx31_set_gpr(enum iomux_gp_func gp, char en)
 {
 	u32 l;
+	struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
 
-	l = readl(IOMUXC_GPR);
+	l = readl(&iomuxc->gpr);
 	if (en)
 		l |= gp;
 	else
 		l &= ~gp;
 
-	writel(l, IOMUXC_GPR);
+	writel(l, &iomuxc->gpr);
 }
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index afdaa1c..0147920 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -98,6 +98,12 @@  struct iim_regs {
 	u32 iim_scs3;
 };
 
+struct iomuxc_regs {
+	u32 unused1;
+	u32 unused2;
+	u32 gpr;
+};
+
 struct mx3_cpu_type {
 	u8 srev;
 	u32 v;
@@ -636,7 +642,6 @@  struct esdc_regs {
 #define WEIM_BASE	0xb8002000
 
 #define IOMUXC_BASE	0x43FAC000
-#define IOMUXC_GPR	(IOMUXC_BASE + 0x8)
 #define IOMUXC_SW_MUX_CTL(x)	(IOMUXC_BASE + 0xc + (x) * 4)
 #define IOMUXC_SW_PAD_CTL(x)	(IOMUXC_BASE + 0x154 + (x) * 4)