| Message ID | 1318019722-11095-1-git-send-email-timur@freescale.com |
|---|---|
| State | Superseded |
| Delegated to: | Andy Fleming |
| Headers | show |
On Oct 7, 2011, at 3:35 PM, Timur Tabi wrote: > Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes > displays which of these is actually built, but it's inconsistent. This is > especially problematic since the "default" build for a given 85xx board can > be either one, so if you don't see a message, you can't always know which > size is being used. Not only that, but each board includes code that displays > the message, so there is duplication. > > So instead of displaying this message at boot time, the address map size > information is moved into the 'bdinfo' command. The board-specific code is > deleted. > > Signed-off-by: Timur Tabi <timur@freescale.com> > --- > board/freescale/corenet_ds/corenet_ds.c | 4 ---- > board/freescale/mpc8536ds/mpc8536ds.c | 7 +------ > board/freescale/mpc8572ds/mpc8572ds.c | 6 +----- > board/freescale/p1010rdb/p1010rdb.c | 6 +----- > board/freescale/p1022ds/p1022ds.c | 8 ++------ > board/freescale/p1_p2_rdb/p1_p2_rdb.c | 4 +--- > board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 8 +------- > board/freescale/p2020ds/p2020ds.c | 8 ++------ > board/freescale/p2041rdb/p2041rdb.c | 4 ---- > common/cmd_bdinfo.c | 8 ++++++++ > 10 files changed, 17 insertions(+), 46 deletions(-) For the FSL boards, lets add 'bdinfo' to 'preboot' and enable CONFIG_PREBOOT > > diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c > index b1eecc4..a33c936 100644 > --- a/board/freescale/corenet_ds/corenet_ds.c > +++ b/board/freescale/corenet_ds/corenet_ds.c > @@ -62,10 +62,6 @@ int checkboard (void) > else > printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH); > > -#ifdef CONFIG_PHYS_64BIT > - puts("36-bit Addressing\n"); > -#endif > - > /* Display the RCW, so that no one gets confused as to what RCW > * we're actually using for this boot. > */ > diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c > index c9f85c8..6d0bfde 100644 > --- a/board/freescale/mpc8536ds/mpc8536ds.c > +++ b/board/freescale/mpc8536ds/mpc8536ds.c > @@ -68,12 +68,7 @@ int checkboard (void) > u8 vboot; > u8 *pixis_base = (u8 *)PIXIS_BASE; > > - puts("Board: MPC8536DS "); > -#ifdef CONFIG_PHYS_64BIT > - puts("(36-bit addrmap) "); > -#endif > - > - printf ("Sys ID: 0x%02x, " > + printf("Board: MPC8536DS Sys ID: 0x%02x, " > "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", > in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), > in_8(pixis_base + PIXIS_PVER)); > diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c > index b20299e..33a02ba 100644 > --- a/board/freescale/mpc8572ds/mpc8572ds.c > +++ b/board/freescale/mpc8572ds/mpc8572ds.c > @@ -45,11 +45,7 @@ int checkboard (void) > u8 vboot; > u8 *pixis_base = (u8 *)PIXIS_BASE; > > - puts ("Board: MPC8572DS "); > -#ifdef CONFIG_PHYS_64BIT > - puts ("(36-bit addrmap) "); > -#endif > - printf ("Sys ID: 0x%02x, " > + printf("Board: MPC8572DS Sys ID: 0x%02x, " > "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", > in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), > in_8(pixis_base + PIXIS_PVER)); > diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c > index 03e9da1..7aa2117 100644 > --- a/board/freescale/p1010rdb/p1010rdb.c > +++ b/board/freescale/p1010rdb/p1010rdb.c > @@ -165,11 +165,7 @@ int checkboard(void) > struct cpu_type *cpu; > > cpu = gd->cpu; > - printf("Board: %sRDB ", cpu->name); > -#ifdef CONFIG_PHYS_64BIT > - puts("(36-bit addrmap)"); > -#endif > - puts("\n"); > + printf("Board: %sRDB\n", cpu->name); > > return 0; > } > diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c > index 456d9b0..aca30f3 100644 > --- a/board/freescale/p1022ds/p1022ds.c > +++ b/board/freescale/p1022ds/p1022ds.c > @@ -56,12 +56,8 @@ int checkboard(void) > { > u8 sw; > > - puts("Board: P1022DS "); > -#ifdef CONFIG_PHYS_64BIT > - puts("(36-bit addrmap) "); > -#endif > - > - printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", > + printf("Board: P1022DS Sys ID: 0x%02x, " > + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", > in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); > > sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); > diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c > index 864b3ce..6418710 100644 > --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c > +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c > @@ -110,9 +110,7 @@ int checkboard (void) > > cpu = gd->cpu; > printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev); > -#ifdef CONFIG_PHYS_64BIT > - puts ("(36-bit addrmap) \n"); > -#endif > + > setbits_be32(&pgpio->gpdir, GPIO_DIR); > > /* > diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c > index 4671128..abe087b 100644 > --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c > +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c > @@ -225,13 +225,7 @@ int checkboard(void) > ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); > u8 in, out, io_config, val; > > - printf("Board: %s ", CONFIG_BOARDNAME); > - > -#ifdef CONFIG_PHYS_64BIT > - puts("(36-bit addrmap) "); > -#endif > - > - printf("CPLD: V%d.%d PCBA: V%d.0\n", > + printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME, > in_8(&cpld_data->cpld_rev_major) & 0x0F, > in_8(&cpld_data->cpld_rev_minor) & 0x0F, > in_8(&cpld_data->pcba_rev) & 0x0F); > diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c > index d3af6cf..e8d31a4 100644 > --- a/board/freescale/p2020ds/p2020ds.c > +++ b/board/freescale/p2020ds/p2020ds.c > @@ -61,12 +61,8 @@ int checkboard(void) > { > u8 sw; > > - puts("Board: P2020DS "); > -#ifdef CONFIG_PHYS_64BIT > - puts("(36-bit addrmap) "); > -#endif > - > - printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", > + printf("Board: P2020DS Sys ID: 0x%02x, " > + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", > in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); > > sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); > diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c > index 6461bd7..1eed67e 100644 > --- a/board/freescale/p2041rdb/p2041rdb.c > +++ b/board/freescale/p2041rdb/p2041rdb.c > @@ -54,10 +54,6 @@ int checkboard(void) > sw = CPLD_READ(fbank_sel); > printf("vBank: %d\n", sw & 0x1); > > -#ifdef CONFIG_PHYS_64BIT > - puts("36-bit Addressing\n"); > -#endif > - > /* > * Display the RCW, so that no one gets confused as to what RCW > * we're actually using for this boot. > diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c > index 6051120..12863f2 100644 > --- a/common/cmd_bdinfo.c > +++ b/common/cmd_bdinfo.c > @@ -96,6 +96,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) > print_str("pevfreq", strmhz(buf, bd->bi_pevfreq)); > #endif > > +#ifdef CONFIG_ENABLE_36BIT_PHYS > +#ifdef CONFIG_PHYS_64BIT > + puts("addressing = 36-bit\n"); > +#else > + puts("addressing = 32-bit\n"); > +#endif > +#endif > + > print_eth(0); > #if defined(CONFIG_HAS_ETH1) > print_eth(1); > -- > 1.7.3.4 > > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
Kumar Gala wrote:
> For the FSL boards, lets add 'bdinfo' to 'preboot' and enable CONFIG_PREBOOT
I don't think that's a good idea. bdinfo display about a dozen lines of
text, most of it is not generally useful. Plus, this would make preboot
unavailable for everyone else.
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index b1eecc4..a33c936 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -62,10 +62,6 @@ int checkboard (void) else printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH); -#ifdef CONFIG_PHYS_64BIT - puts("36-bit Addressing\n"); -#endif - /* Display the RCW, so that no one gets confused as to what RCW * we're actually using for this boot. */ diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index c9f85c8..6d0bfde 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -68,12 +68,7 @@ int checkboard (void) u8 vboot; u8 *pixis_base = (u8 *)PIXIS_BASE; - puts("Board: MPC8536DS "); -#ifdef CONFIG_PHYS_64BIT - puts("(36-bit addrmap) "); -#endif - - printf ("Sys ID: 0x%02x, " + printf("Board: MPC8536DS Sys ID: 0x%02x, " "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in_8(pixis_base + PIXIS_PVER)); diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index b20299e..33a02ba 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -45,11 +45,7 @@ int checkboard (void) u8 vboot; u8 *pixis_base = (u8 *)PIXIS_BASE; - puts ("Board: MPC8572DS "); -#ifdef CONFIG_PHYS_64BIT - puts ("(36-bit addrmap) "); -#endif - printf ("Sys ID: 0x%02x, " + printf("Board: MPC8572DS Sys ID: 0x%02x, " "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in_8(pixis_base + PIXIS_PVER)); diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c index 03e9da1..7aa2117 100644 --- a/board/freescale/p1010rdb/p1010rdb.c +++ b/board/freescale/p1010rdb/p1010rdb.c @@ -165,11 +165,7 @@ int checkboard(void) struct cpu_type *cpu; cpu = gd->cpu; - printf("Board: %sRDB ", cpu->name); -#ifdef CONFIG_PHYS_64BIT - puts("(36-bit addrmap)"); -#endif - puts("\n"); + printf("Board: %sRDB\n", cpu->name); return 0; } diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 456d9b0..aca30f3 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -56,12 +56,8 @@ int checkboard(void) { u8 sw; - puts("Board: P1022DS "); -#ifdef CONFIG_PHYS_64BIT - puts("(36-bit addrmap) "); -#endif - - printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + printf("Board: P1022DS Sys ID: 0x%02x, " + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index 864b3ce..6418710 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -110,9 +110,7 @@ int checkboard (void) cpu = gd->cpu; printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev); -#ifdef CONFIG_PHYS_64BIT - puts ("(36-bit addrmap) \n"); -#endif + setbits_be32(&pgpio->gpdir, GPIO_DIR); /* diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 4671128..abe087b 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -225,13 +225,7 @@ int checkboard(void) ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u8 in, out, io_config, val; - printf("Board: %s ", CONFIG_BOARDNAME); - -#ifdef CONFIG_PHYS_64BIT - puts("(36-bit addrmap) "); -#endif - - printf("CPLD: V%d.%d PCBA: V%d.0\n", + printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME, in_8(&cpld_data->cpld_rev_major) & 0x0F, in_8(&cpld_data->cpld_rev_minor) & 0x0F, in_8(&cpld_data->pcba_rev) & 0x0F); diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index d3af6cf..e8d31a4 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -61,12 +61,8 @@ int checkboard(void) { u8 sw; - puts("Board: P2020DS "); -#ifdef CONFIG_PHYS_64BIT - puts("(36-bit addrmap) "); -#endif - - printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + printf("Board: P2020DS Sys ID: 0x%02x, " + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 6461bd7..1eed67e 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -54,10 +54,6 @@ int checkboard(void) sw = CPLD_READ(fbank_sel); printf("vBank: %d\n", sw & 0x1); -#ifdef CONFIG_PHYS_64BIT - puts("36-bit Addressing\n"); -#endif - /* * Display the RCW, so that no one gets confused as to what RCW * we're actually using for this boot. diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 6051120..12863f2 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -96,6 +96,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_str("pevfreq", strmhz(buf, bd->bi_pevfreq)); #endif +#ifdef CONFIG_ENABLE_36BIT_PHYS +#ifdef CONFIG_PHYS_64BIT + puts("addressing = 36-bit\n"); +#else + puts("addressing = 32-bit\n"); +#endif +#endif + print_eth(0); #if defined(CONFIG_HAS_ETH1) print_eth(1);
Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes displays which of these is actually built, but it's inconsistent. This is especially problematic since the "default" build for a given 85xx board can be either one, so if you don't see a message, you can't always know which size is being used. Not only that, but each board includes code that displays the message, so there is duplication. So instead of displaying this message at boot time, the address map size information is moved into the 'bdinfo' command. The board-specific code is deleted. Signed-off-by: Timur Tabi <timur@freescale.com> --- board/freescale/corenet_ds/corenet_ds.c | 4 ---- board/freescale/mpc8536ds/mpc8536ds.c | 7 +------ board/freescale/mpc8572ds/mpc8572ds.c | 6 +----- board/freescale/p1010rdb/p1010rdb.c | 6 +----- board/freescale/p1022ds/p1022ds.c | 8 ++------ board/freescale/p1_p2_rdb/p1_p2_rdb.c | 4 +--- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 8 +------- board/freescale/p2020ds/p2020ds.c | 8 ++------ board/freescale/p2041rdb/p2041rdb.c | 4 ---- common/cmd_bdinfo.c | 8 ++++++++ 10 files changed, 17 insertions(+), 46 deletions(-)