| Message ID | 20110920172931.BB66DF8DA8@sepang.rtg.net |
|---|---|
| State | New |
| Headers | show |
On Tue, Sep 20, 2011 at 11:29:31AM -0600, Tim Gardner wrote: > From 6e243f86d1424d7a1d67da4f8527239a786d9c2f Mon Sep 17 00:00:00 2001 > From: Len Brown <len.brown@intel.com> > Date: Thu, 14 Jul 2011 00:53:24 -0400 > Subject: [PATCH] x86, intel, power: Initialize MSR_IA32_ENERGY_PERF_BIAS > > BugLink: http://bugs.launchpad.net/bugs/760131 > > commit abe48b108247e9b90b4c6739662a2e5c765ed114 upstream. > > Since 2.6.36 (23016bf0d25), Linux prints the existence of "epb" in /proc/cpuinfo, > Since 2.6.38 (d5532ee7b40), the x86_energy_perf_policy(8) utility has > been available in-tree to update MSR_IA32_ENERGY_PERF_BIAS. > > However, the typical BIOS fails to initialize the MSR, presumably > because this is handled by high-volume shrink-wrap operating systems... > > Linux distros, on the other hand, do not yet invoke x86_energy_perf_policy(8). > As a result, WSM-EP, SNB, and later hardware from Intel will run in its > default hardware power-on state (performance), which assumes that users > care for performance at all costs and not for energy efficiency. > While that is fine for performance benchmarks, the hardware's intended default > operating point is "normal" mode... > > Initialize the MSR to the "normal" by default during kernel boot. > > x86_energy_perf_policy(8) is available to change the default after boot, > should the user have a different preference. > > Signed-off-by: Len Brown <len.brown@intel.com> > Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1107140051020.18606@x980 > Acked-by: Rafael J. Wysocki <rjw@sisk.pl> > Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> > Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> > Signed-off-by: Tim Gardner <tim.gardner@canonical.com> SRU justification is missing on the bug. Acked-by: Seth Forshee <seth.forshee@canonical.com>
On Tue, Sep 20, 2011 at 11:29:31AM -0600, Tim Gardner wrote: > From 6e243f86d1424d7a1d67da4f8527239a786d9c2f Mon Sep 17 00:00:00 2001 > From: Len Brown <len.brown@intel.com> > Date: Thu, 14 Jul 2011 00:53:24 -0400 > Subject: [PATCH] x86, intel, power: Initialize MSR_IA32_ENERGY_PERF_BIAS > > BugLink: http://bugs.launchpad.net/bugs/760131 > > commit abe48b108247e9b90b4c6739662a2e5c765ed114 upstream. > > Since 2.6.36 (23016bf0d25), Linux prints the existence of "epb" in /proc/cpuinfo, > Since 2.6.38 (d5532ee7b40), the x86_energy_perf_policy(8) utility has > been available in-tree to update MSR_IA32_ENERGY_PERF_BIAS. > > However, the typical BIOS fails to initialize the MSR, presumably > because this is handled by high-volume shrink-wrap operating systems... > > Linux distros, on the other hand, do not yet invoke x86_energy_perf_policy(8). > As a result, WSM-EP, SNB, and later hardware from Intel will run in its > default hardware power-on state (performance), which assumes that users > care for performance at all costs and not for energy efficiency. > While that is fine for performance benchmarks, the hardware's intended default > operating point is "normal" mode... > > Initialize the MSR to the "normal" by default during kernel boot. > > x86_energy_perf_policy(8) is available to change the default after boot, > should the user have a different preference. > > Signed-off-by: Len Brown <len.brown@intel.com> > Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1107140051020.18606@x980 > Acked-by: Rafael J. Wysocki <rjw@sisk.pl> > Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> > Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> > Signed-off-by: Tim Gardner <tim.gardner@canonical.com> > --- > arch/x86/include/asm/msr-index.h | 3 +++ > arch/x86/kernel/cpu/intel.c | 18 ++++++++++++++++++ > 2 files changed, 21 insertions(+), 0 deletions(-) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 485b4f1..23a9d89 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -259,6 +259,9 @@ > #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 > > #define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 > +#define ENERGY_PERF_BIAS_PERFORMANCE 0 > +#define ENERGY_PERF_BIAS_NORMAL 6 > +#define ENERGY_PERF_BIAS_POWERSWAVE 15 > > #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 > > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > index 1edf5ba..da0d779 100644 > --- a/arch/x86/kernel/cpu/intel.c > +++ b/arch/x86/kernel/cpu/intel.c > @@ -456,6 +456,24 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) > > if (cpu_has(c, X86_FEATURE_VMX)) > detect_vmx_virtcap(c); > + > + /* > + * Initialize MSR_IA32_ENERGY_PERF_BIAS if BIOS did not. > + * x86_energy_perf_policy(8) is available to change it at run-time > + */ > + if (cpu_has(c, X86_FEATURE_EPB)) { > + u64 epb; > + > + rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); > + if ((epb & 0xF) == 0) { > + printk_once(KERN_WARNING, "x86: updated energy_perf_bias" > + " to 'normal' from 'performance'\n" > + "You can view and update epb via utility," > + " such as x86_energy_perf_policy(8)\n"); > + epb = (epb & ~0xF) | ENERGY_PERF_BIAS_NORMAL; > + wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); > + } > + } > } > > #ifdef CONFIG_X86_32 Looks to do what it claims. Changing the default to something more middle of the road seems appropriate. Acked-by: Andy Whitcroft <apw@canonical.com> -apw
On 09/20/2011 11:29 AM, Tim Gardner wrote: > From 6e243f86d1424d7a1d67da4f8527239a786d9c2f Mon Sep 17 00:00:00 2001 > From: Len Brown<len.brown@intel.com> > Date: Thu, 14 Jul 2011 00:53:24 -0400 > Subject: [PATCH] x86, intel, power: Initialize MSR_IA32_ENERGY_PERF_BIAS > > BugLink: http://bugs.launchpad.net/bugs/760131 > > commit abe48b108247e9b90b4c6739662a2e5c765ed114 upstream. > > Since 2.6.36 (23016bf0d25), Linux prints the existence of "epb" in /proc/cpuinfo, > Since 2.6.38 (d5532ee7b40), the x86_energy_perf_policy(8) utility has > been available in-tree to update MSR_IA32_ENERGY_PERF_BIAS. > > However, the typical BIOS fails to initialize the MSR, presumably > because this is handled by high-volume shrink-wrap operating systems... > > Linux distros, on the other hand, do not yet invoke x86_energy_perf_policy(8). > As a result, WSM-EP, SNB, and later hardware from Intel will run in its > default hardware power-on state (performance), which assumes that users > care for performance at all costs and not for energy efficiency. > While that is fine for performance benchmarks, the hardware's intended default > operating point is "normal" mode... > > Initialize the MSR to the "normal" by default during kernel boot. > > x86_energy_perf_policy(8) is available to change the default after boot, > should the user have a different preference. > > Signed-off-by: Len Brown<len.brown@intel.com> > Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1107140051020.18606@x980 > Acked-by: Rafael J. Wysocki<rjw@sisk.pl> > Signed-off-by: H. Peter Anvin<hpa@linux.intel.com> > Signed-off-by: Greg Kroah-Hartman<gregkh@suse.de> > Signed-off-by: Tim Gardner<tim.gardner@canonical.com> > --- > arch/x86/include/asm/msr-index.h | 3 +++ > arch/x86/kernel/cpu/intel.c | 18 ++++++++++++++++++ > 2 files changed, 21 insertions(+), 0 deletions(-) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 485b4f1..23a9d89 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -259,6 +259,9 @@ > #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 > > #define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 > +#define ENERGY_PERF_BIAS_PERFORMANCE 0 > +#define ENERGY_PERF_BIAS_NORMAL 6 > +#define ENERGY_PERF_BIAS_POWERSWAVE 15 > > #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 > > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > index 1edf5ba..da0d779 100644 > --- a/arch/x86/kernel/cpu/intel.c > +++ b/arch/x86/kernel/cpu/intel.c > @@ -456,6 +456,24 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) > > if (cpu_has(c, X86_FEATURE_VMX)) > detect_vmx_virtcap(c); > + > + /* > + * Initialize MSR_IA32_ENERGY_PERF_BIAS if BIOS did not. > + * x86_energy_perf_policy(8) is available to change it at run-time > + */ > + if (cpu_has(c, X86_FEATURE_EPB)) { > + u64 epb; > + > + rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); > + if ((epb& 0xF) == 0) { > + printk_once(KERN_WARNING, "x86: updated energy_perf_bias" > + " to 'normal' from 'performance'\n" > + "You can view and update epb via utility," > + " such as x86_energy_perf_policy(8)\n"); > + epb = (epb& ~0xF) | ENERGY_PERF_BIAS_NORMAL; > + wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); > + } > + } > } > > #ifdef CONFIG_X86_32
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 485b4f1..23a9d89 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -259,6 +259,9 @@ #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 #define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 +#define ENERGY_PERF_BIAS_PERFORMANCE 0 +#define ENERGY_PERF_BIAS_NORMAL 6 +#define ENERGY_PERF_BIAS_POWERSWAVE 15 #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 1edf5ba..da0d779 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -456,6 +456,24 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) if (cpu_has(c, X86_FEATURE_VMX)) detect_vmx_virtcap(c); + + /* + * Initialize MSR_IA32_ENERGY_PERF_BIAS if BIOS did not. + * x86_energy_perf_policy(8) is available to change it at run-time + */ + if (cpu_has(c, X86_FEATURE_EPB)) { + u64 epb; + + rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); + if ((epb & 0xF) == 0) { + printk_once(KERN_WARNING, "x86: updated energy_perf_bias" + " to 'normal' from 'performance'\n" + "You can view and update epb via utility," + " such as x86_energy_perf_policy(8)\n"); + epb = (epb & ~0xF) | ENERGY_PERF_BIAS_NORMAL; + wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); + } + } } #ifdef CONFIG_X86_32