diff mbox series

[1/2] dt-bindings: reset: document Broadcom's BCM4908 PCIe reset binding

Message ID 20201127111442.1096-1-zajec5@gmail.com
State Not Applicable, archived
Headers show
Series [1/2] dt-bindings: reset: document Broadcom's BCM4908 PCIe reset binding | expand

Checks

Context Check Description
robh/checkpatch success
robh/dt-meta-schema success

Commit Message

Rafał Miłecki Nov. 27, 2020, 11:14 a.m. UTC
From: Rafał Miłecki <rafal@milecki.pl>

BCM4908 was built using older PCIe hardware block that requires using
external reset block controlling PERST# signals.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
 .../reset/brcm,bcm4908-misc-pcie-reset.yaml   | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml

Comments

Florian Fainelli Nov. 28, 2020, 5:09 a.m. UTC | #1
On 11/27/2020 3:14 AM, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> BCM4908 was built using older PCIe hardware block that requires using
> external reset block controlling PERST# signals.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli Nov. 28, 2020, 5:10 a.m. UTC | #2
On 11/27/2020 3:14 AM, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> It's a trivial reset controller. One register with bit per PCIe core.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Rob Herring Dec. 8, 2020, 7:46 p.m. UTC | #3
On Fri, 27 Nov 2020 12:14:41 +0100, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> BCM4908 was built using older PCIe hardware block that requires using
> external reset block controlling PERST# signals.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
>  .../reset/brcm,bcm4908-misc-pcie-reset.yaml   | 39 +++++++++++++++++++
>  1 file changed, 39 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Philipp Zabel Dec. 9, 2020, 11:06 a.m. UTC | #4
On Fri, 2020-11-27 at 12:14 +0100, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> BCM4908 was built using older PCIe hardware block that requires using
> external reset block controlling PERST# signals.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

Thank you, both applied to reset/next.

regards
Philipp
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
new file mode 100644
index 000000000000..88aebb370838
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
@@ -0,0 +1,39 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/brcm,bcm4908-misc-pcie-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom MISC block PCIe reset controller
+
+description: This document describes reset controller handling PCIe PERST#
+  signals. On BCM4908 it's a part of the MISC block.
+
+maintainers:
+  - Rafał Miłecki <rafal@milecki.pl>
+
+properties:
+  compatible:
+    const: brcm,bcm4908-misc-pcie-reset
+
+  reg:
+    maxItems: 1
+
+  "#reset-cells":
+    description: PCIe core id
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    reset-controller@ff802644 {
+        compatible = "brcm,bcm4908-misc-pcie-reset";
+        reg = <0xff802644 0x04>;
+        #reset-cells = <1>;
+    };