diff mbox series

[2/4] dt-bindings: media: allegro,al5e: Convert to YAML

Message ID 20201126152941.3825721-3-m.tretter@pengutronix.de
State Changes Requested, archived
Headers show
Series media: allegro: move driver out of staging | expand

Checks

Context Check Description
robh/checkpatch warning total: 0 errors, 1 warnings, 102 lines checked
robh/dt-meta-schema fail build log

Commit Message

Michael Tretter Nov. 26, 2020, 3:29 p.m. UTC 
Convert the Allegro DVT video IP codec text binding to Yaml.

Add the converted binding to the MAINTAINERS file.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 .../bindings/media/allegro,al5e.yaml          | 95 +++++++++++++++++++
 .../devicetree/bindings/media/allegro.txt     | 43 ---------
 MAINTAINERS                                   |  1 +
 3 files changed, 96 insertions(+), 43 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/allegro,al5e.yaml
 delete mode 100644 Documentation/devicetree/bindings/media/allegro.txt

Comments

Rob Herring Nov. 30, 2020, 5 p.m. UTC | #1 
On Thu, 26 Nov 2020 16:29:39 +0100, Michael Tretter wrote:
> Convert the Allegro DVT video IP codec text binding to Yaml.
> 
> Add the converted binding to the MAINTAINERS file.
> 
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---
>  .../bindings/media/allegro,al5e.yaml          | 95 +++++++++++++++++++
>  .../devicetree/bindings/media/allegro.txt     | 43 ---------
>  MAINTAINERS                                   |  1 +
>  3 files changed, 96 insertions(+), 43 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/media/allegro,al5e.yaml
>  delete mode 100644 Documentation/devicetree/bindings/media/allegro.txt
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/media/allegro,al5e.yaml:24:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/media/allegro,al5e.yaml:27:9: [warning] wrong indentation: expected 10 but found 8 (indentation)

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/allegro,al5e.example.dt.yaml: example-0: video-codec@a0009000:reg:0: [0, 2684391424, 0, 4096] is too long
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/allegro,al5e.example.dt.yaml: example-0: video-codec@a0009000:reg:1: [0, 2684354560, 0, 32768] is too long
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/allegro,al5e.example.dt.yaml: example-1: video-codec@a0029000:reg:0: [0, 2684522496, 0, 4096] is too long
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/media/allegro,al5e.example.dt.yaml: example-1: video-codec@a0029000:reg:1: [0, 2684485632, 0, 32768] is too long
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml


See https://patchwork.ozlabs.org/patch/1406739

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/allegro,al5e.yaml b/Documentation/devicetree/bindings/media/allegro,al5e.yaml
new file mode 100644
index 000000000000..1ac698772fa0
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/allegro,al5e.yaml
@@ -0,0 +1,95 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/allegro,al5e.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allegro DVT Video IP Codecs Device Tree Bindings
+
+maintainers:
+  - Michael Tretter <m.tretter@pengutronix.de>
+
+description: |-
+  Allegro DVT video IP codecs present in the Xilinx ZynqMP SoC. The IP core may
+  either be a H.264/H.265 encoder or H.264/H.265 decoder ip core.
+
+  Each actual codec engine is controlled by a microcontroller (MCU). Host
+  software uses a provided mailbox interface to communicate with the MCU. The
+  MCUs share an interrupt.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+        - const: allegro,al5e-1.1
+        - const: allegro,al5e
+      - items:
+        - const: allegro,al5d-1.1
+        - const: allegro,al5d
+
+  reg:
+    items:
+      - description: The registers
+      - description: The SRAM
+
+  reg-names:
+    items:
+      - const: regs
+      - const: sram
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Core clock
+      - description: MCU clock
+      - description: Core AXI master port clock
+      - description: MCU AXI master port clock
+      - description: AXI4-Lite slave port clock
+
+  clock-names:
+    items:
+      - const: core_clk
+      - const: mcu_clk
+      - const: m_axi_core_aclk
+      - const: m_axi_mcu_aclk
+      - const: s_axi_lite_aclk
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - clocks
+  - clock-names
+
+additionalProperties: False
+
+examples:
+  - |
+    al5e: video-codec@a0009000 {
+        compatible = "allegro,al5e-1.1", "allegro,al5e";
+        reg = <0 0xa0009000 0 0x1000>,
+              <0 0xa0000000 0 0x8000>;
+        reg-names = "regs", "sram";
+        interrupts = <0 96 4>;
+        clocks = <&xlnx_vcu 0>, <&xlnx_vcu 1>,
+                 <&clkc 71>, <&clkc 71>, <&clkc 71>;
+        clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",
+                      "m_axi_mcu_aclk", "s_axi_lite_aclk";
+      };
+  - |
+    al5d: video-codec@a0029000 {
+        compatible = "allegro,al5d-1.1", "allegro,al5d";
+        reg = <0 0xa0029000 0 0x1000>,
+              <0 0xa0020000 0 0x8000>;
+        reg-names = "regs", "sram";
+        interrupts = <0 96 4>;
+        clocks = <&xlnx_vcu 2>, <&xlnx_vcu 3>,
+                 <&clkc 71>, <&clkc 71>, <&clkc 71>;
+        clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",
+        "m_axi_mcu_aclk", "s_axi_lite_aclk";
+    };
+
+...
diff --git a/Documentation/devicetree/bindings/media/allegro.txt b/Documentation/devicetree/bindings/media/allegro.txt
deleted file mode 100644
index a92e2fbf26c9..000000000000
--- a/Documentation/devicetree/bindings/media/allegro.txt
+++ /dev/null
@@ -1,43 +0,0 @@ 
-Device-tree bindings for the Allegro DVT video IP codecs present in the Xilinx
-ZynqMP SoC. The IP core may either be a H.264/H.265 encoder or H.264/H.265
-decoder ip core.
-
-Each actual codec engines is controlled by a microcontroller (MCU). Host
-software uses a provided mailbox interface to communicate with the MCU. The
-MCU share an interrupt.
-
-Required properties:
-  - compatible: value should be one of the following
-    "allegro,al5e-1.1", "allegro,al5e": encoder IP core
-    "allegro,al5d-1.1", "allegro,al5d": decoder IP core
-  - reg: base and length of the memory mapped register region and base and
-    length of the memory mapped sram
-  - reg-names: must include "regs" and "sram"
-  - interrupts: shared interrupt from the MCUs to the processing system
-  - clocks: must contain an entry for each entry in clock-names
-  - clock-names: must include "core_clk", "mcu_clk", "m_axi_core_aclk",
-    "m_axi_mcu_aclk", "s_axi_lite_aclk"
-
-Example:
-	al5e: video-codec@a0009000 {
-		compatible = "allegro,al5e-1.1", "allegro,al5e";
-		reg = <0 0xa0009000 0 0x1000>,
-		      <0 0xa0000000 0 0x8000>;
-		reg-names = "regs", "sram";
-		interrupts = <0 96 4>;
-		clocks = <&xlnx_vcu 0>, <&xlnx_vcu 1>,
-			 <&clkc 71>, <&clkc 71>, <&clkc 71>;
-		clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",
-			      "m_axi_mcu_aclk", "s_axi_lite_aclk"
-	};
-	al5d: video-codec@a0029000 {
-		compatible = "allegro,al5d-1.1", "allegro,al5d";
-		reg = <0 0xa0029000 0 0x1000>,
-		      <0 0xa0020000 0 0x8000>;
-		reg-names = "regs", "sram";
-		interrupts = <0 96 4>;
-		clocks = <&xlnx_vcu 2>, <&xlnx_vcu 3>,
-			 <&clkc 71>, <&clkc 71>, <&clkc 71>;
-		clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",
-			      "m_axi_mcu_aclk", "s_axi_lite_aclk"
-	};
diff --git a/MAINTAINERS b/MAINTAINERS
index 64f355e3bdc7..76bb63c5bebf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -699,6 +699,7 @@  M:	Michael Tretter <m.tretter@pengutronix.de>
 R:	Pengutronix Kernel Team <kernel@pengutronix.de>
 L:	linux-media@vger.kernel.org
 S:	Maintained
+F:	Documentation/devicetree/bindings/media/allegro,al5e.yaml
 F:	drivers/media/platform/allegro-dvt/
 
 ALLWINNER A10 CSI DRIVER