diff mbox series

ARM: imx: Add support for the primary/secondary bmode to MX53

Message ID 20200904225301.16238-1-marex@denx.de
State Accepted
Commit 08945cceffaddd60f064145c36f8e1a532cbea67
Delegated to: Stefano Babic
Headers show
Series ARM: imx: Add support for the primary/secondary bmode to MX53 | expand

Commit Message

Marek Vasut Sept. 4, 2020, 10:53 p.m. UTC 
Implement the 'getprisec' subcommand of 'bmode' command for i.MX53 and
also the primary/secondary bootmode switching.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/mach-imx/mx5/soc.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

Comments

Stefano Babic Nov. 2, 2020, 8:08 a.m. UTC | #1 
> Implement the 'getprisec' subcommand of 'bmode' command for i.MX53 and
> also the primary/secondary bootmode switching.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/mx5/soc.c b/arch/arm/mach-imx/mx5/soc.c
index c61fcce3eb..47f531dc85 100644
--- a/arch/arm/mach-imx/mx5/soc.c
+++ b/arch/arm/mach-imx/mx5/soc.c
@@ -87,10 +87,27 @@  void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 #endif
 
 #ifdef CONFIG_MX53
+#define IMX53_SRTC_LPGR_PERSIST_SECONDARY_BOOT	BIT(30)
+
 void boot_mode_apply(unsigned cfg_val)
 {
-	writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr);
+	void *lpgr = &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr;
+
+	if (cfg_val == MAKE_CFGVAL_PRIMARY_BOOT)
+		clrbits_le32(lpgr, IMX53_SRTC_LPGR_PERSIST_SECONDARY_BOOT);
+	else if (cfg_val == MAKE_CFGVAL_SECONDARY_BOOT)
+		setbits_le32(lpgr, IMX53_SRTC_LPGR_PERSIST_SECONDARY_BOOT);
+	else
+		writel(cfg_val, lpgr);
+}
+
+int boot_mode_getprisec(void)
+{
+	void *lpgr = &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr;
+
+	return !!(readl(lpgr) & IMX53_SRTC_LPGR_PERSIST_SECONDARY_BOOT);
 }
+
 /*
  * cfg_val will be used for
  * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
@@ -112,6 +129,8 @@  const struct boot_mode soc_boot_modes[] = {
 	{"esdhc2",	MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
 	{"esdhc3",	MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
 	{"esdhc4",	MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},
+	{"primary",	MAKE_CFGVAL_PRIMARY_BOOT},
+	{"secondary",	MAKE_CFGVAL_SECONDARY_BOOT},
 	{NULL,		0},
 };
 #endif