mbox series

[0/5,SRU,G,OEM-5.6] Tiger Lake PMC core driver fixes

Message ID 20201030060214.780883-1-acelan.kao@canonical.com
Headers show
Series Tiger Lake PMC core driver fixes | expand

Message

AceLan Kao Oct. 30, 2020, 6:01 a.m. UTC 
BugLink: https://bugs.launchpad.net/bugs/1899883

[Impact]
The power gating status is not correct and the slp_s0 value is not correct
on Intel TigerLake platform.

[Fix]
The patchset in
https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/
provides several critical fixes for intel_pmc_core driver.

[Test]
Verified on some TigerLake platforms

[Regression Potential]
Low, the fix for status bits map and the slp_s0 calculation are simple
and clear, should have low impact on regression.

David E. Box (1):
  platform/x86: pmc_core: Use descriptive names for LPM registers

Gaurav Singh (1):
  platform/x86: intel_pmc_core: fix bound check in
    pmc_core_mphy_pg_show()

Gayatri Kammela (2):
  platform/x86: intel_pmc_core: Fix TigerLake power gating status map
  platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value

Sathyanarayana Nujella (1):
  platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name

 drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
 drivers/platform/x86/intel_pmc_core.h |  5 +-
 2 files changed, 49 insertions(+), 42 deletions(-)

Comments

Stefan Bader Oct. 30, 2020, 7:53 a.m. UTC | #1 
On 30.10.20 07:01, AceLan Kao wrote:
> BugLink: https://bugs.launchpad.net/bugs/1899883
> 
> [Impact]
> The power gating status is not correct and the slp_s0 value is not correct
> on Intel TigerLake platform.
> 
> [Fix]
> The patchset in
> https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/
> provides several critical fixes for intel_pmc_core driver.
> 
> [Test]
> Verified on some TigerLake platforms
> 
> [Regression Potential]
> Low, the fix for status bits map and the slp_s0 calculation are simple
> and clear, should have low impact on regression.
> 
> David E. Box (1):
>   platform/x86: pmc_core: Use descriptive names for LPM registers
> 
> Gaurav Singh (1):
>   platform/x86: intel_pmc_core: fix bound check in
>     pmc_core_mphy_pg_show()
> 
> Gayatri Kammela (2):
>   platform/x86: intel_pmc_core: Fix TigerLake power gating status map
>   platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value
> 
> Sathyanarayana Nujella (1):
>   platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name
> 
>  drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
>  drivers/platform/x86/intel_pmc_core.h |  5 +-
>  2 files changed, 49 insertions(+), 42 deletions(-)
> 

First, I only looked at the 5 Groovy primary patches. The set for oem-5.6 is
just too big. And then just a note on the "Impact": Honestly, I cannot
understand how this actually impacts a user. Would I notice somehow? And what
makes the fixes critical? This probably is all very clear to you but I maybe can
gues that PMC means power management controller ... or so...

-Stefan

Acked-by: Stefan Bader <stefan.bader@canonical.com>
AceLan Kao Nov. 2, 2020, 1:46 a.m. UTC | #2 
Sorry, I didn't write the impact clearly.
The slp_s0 value is essential for our tools to confirm whether the
system enters deep sleep,
and the power gating is critical for another tool to check which
device is still running when the system is suspended.
Both are not that useful for a normal user, but useful for developers
to debug power consumption issues.

Stefan Bader <stefan.bader@canonical.com> 於 2020年10月30日 週五 下午3:53寫道：
>
> On 30.10.20 07:01, AceLan Kao wrote:
> > BugLink: https://bugs.launchpad.net/bugs/1899883
> >
> > [Impact]
> > The power gating status is not correct and the slp_s0 value is not correct
> > on Intel TigerLake platform.
> >
> > [Fix]
> > The patchset in
> > https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/
> > provides several critical fixes for intel_pmc_core driver.
> >
> > [Test]
> > Verified on some TigerLake platforms
> >
> > [Regression Potential]
> > Low, the fix for status bits map and the slp_s0 calculation are simple
> > and clear, should have low impact on regression.
> >
> > David E. Box (1):
> >   platform/x86: pmc_core: Use descriptive names for LPM registers
> >
> > Gaurav Singh (1):
> >   platform/x86: intel_pmc_core: fix bound check in
> >     pmc_core_mphy_pg_show()
> >
> > Gayatri Kammela (2):
> >   platform/x86: intel_pmc_core: Fix TigerLake power gating status map
> >   platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value
> >
> > Sathyanarayana Nujella (1):
> >   platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name
> >
> >  drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
> >  drivers/platform/x86/intel_pmc_core.h |  5 +-
> >  2 files changed, 49 insertions(+), 42 deletions(-)
> >
>
> First, I only looked at the 5 Groovy primary patches. The set for oem-5.6 is
> just too big. And then just a note on the "Impact": Honestly, I cannot
> understand how this actually impacts a user. Would I notice somehow? And what
> makes the fixes critical? This probably is all very clear to you but I maybe can
> gues that PMC means power management controller ... or so...
>
> -Stefan
>
> Acked-by: Stefan Bader <stefan.bader@canonical.com>
>
Kelsey Skunberg Nov. 5, 2020, 11:33 p.m. UTC | #3 
Reviewed the Groovy patches and all are clean cherry picks. LGTM. I
added the additional impact information you sent to the bug description. 

Thanks! 

-Kelsey

Acked-by: Kelsey Skunberg <kelsey.skunberg@canonical.com>

On 2020-10-30 14:01:46 , AceLan Kao wrote:
> BugLink: https://bugs.launchpad.net/bugs/1899883
> 
> [Impact]
> The power gating status is not correct and the slp_s0 value is not correct
> on Intel TigerLake platform.
> 
> [Fix]
> The patchset in
> https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/
> provides several critical fixes for intel_pmc_core driver.
> 
> [Test]
> Verified on some TigerLake platforms
> 
> [Regression Potential]
> Low, the fix for status bits map and the slp_s0 calculation are simple
> and clear, should have low impact on regression.
> 
> David E. Box (1):
>   platform/x86: pmc_core: Use descriptive names for LPM registers
> 
> Gaurav Singh (1):
>   platform/x86: intel_pmc_core: fix bound check in
>     pmc_core_mphy_pg_show()
> 
> Gayatri Kammela (2):
>   platform/x86: intel_pmc_core: Fix TigerLake power gating status map
>   platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value
> 
> Sathyanarayana Nujella (1):
>   platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name
> 
>  drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
>  drivers/platform/x86/intel_pmc_core.h |  5 +-
>  2 files changed, 49 insertions(+), 42 deletions(-)
> 
> -- 
> 2.25.1
> 
> 
> -- 
> kernel-team mailing list
> kernel-team@lists.ubuntu.com
> https://lists.ubuntu.com/mailman/listinfo/kernel-team
Ian May Nov. 6, 2020, 5:19 a.m. UTC | #4 
Applied to Groovy/master-next

Thanks,
Ian

On 2020-10-30 14:01:46 , AceLan Kao wrote:
> BugLink: https://bugs.launchpad.net/bugs/1899883
> 
> [Impact]
> The power gating status is not correct and the slp_s0 value is not correct
> on Intel TigerLake platform.
> 
> [Fix]
> The patchset in
> https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/
> provides several critical fixes for intel_pmc_core driver.
> 
> [Test]
> Verified on some TigerLake platforms
> 
> [Regression Potential]
> Low, the fix for status bits map and the slp_s0 calculation are simple
> and clear, should have low impact on regression.
> 
> David E. Box (1):
>   platform/x86: pmc_core: Use descriptive names for LPM registers
> 
> Gaurav Singh (1):
>   platform/x86: intel_pmc_core: fix bound check in
>     pmc_core_mphy_pg_show()
> 
> Gayatri Kammela (2):
>   platform/x86: intel_pmc_core: Fix TigerLake power gating status map
>   platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value
> 
> Sathyanarayana Nujella (1):
>   platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name
> 
>  drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
>  drivers/platform/x86/intel_pmc_core.h |  5 +-
>  2 files changed, 49 insertions(+), 42 deletions(-)
> 
> -- 
> 2.25.1
> 
> 
> -- 
> kernel-team mailing list
> kernel-team@lists.ubuntu.com
> https://lists.ubuntu.com/mailman/listinfo/kernel-team
Timo Aaltonen Nov. 11, 2020, 6:40 a.m. UTC | #5 
On 30.10.2020 8.01, AceLan Kao wrote:
> BugLink: https://bugs.launchpad.net/bugs/1899883
> 
> [Impact]
> The power gating status is not correct and the slp_s0 value is not correct
> on Intel TigerLake platform.
> 
> [Fix]
> The patchset in
> https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/
> provides several critical fixes for intel_pmc_core driver.
> 
> [Test]
> Verified on some TigerLake platforms
> 
> [Regression Potential]
> Low, the fix for status bits map and the slp_s0 calculation are simple
> and clear, should have low impact on regression.
> 
> David E. Box (1):
>    platform/x86: pmc_core: Use descriptive names for LPM registers
> 
> Gaurav Singh (1):
>    platform/x86: intel_pmc_core: fix bound check in
>      pmc_core_mphy_pg_show()
> 
> Gayatri Kammela (2):
>    platform/x86: intel_pmc_core: Fix TigerLake power gating status map
>    platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value
> 
> Sathyanarayana Nujella (1):
>    platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name
> 
>   drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++-------------
>   drivers/platform/x86/intel_pmc_core.h |  5 +-
>   2 files changed, 49 insertions(+), 42 deletions(-)
> 

applied to oem-5.6, thanks