diff mbox series

[3/8] pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1

Message ID 20201028103429.3051-4-biju.das.jz@bp.renesas.com
State Accepted
Commit fee13ae8cb2c4dc8a1582e786efa539077c6ff25
Delegated to: Marek Vasut
Headers show
Series Pin control support for RZ/G2[HN] | expand

Commit Message

Biju Das Oct. 28, 2020, 10:34 a.m. UTC 
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.

Based on the similar patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/pinctrl/renesas/pfc-r8a7796.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Marek Vasut Nov. 1, 2020, 11:31 a.m. UTC | #1 
On 10/28/20 11:34 AM, Biju Das wrote:
> This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
> Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
> (R8A7796[01]) is not enabled.
> 
> Based on the similar patch on Linux.

Is this patch now part of mainline Linux or is there a patchwork link?

Applied, thanks
Biju Das Nov. 1, 2020, 6:58 p.m. UTC | #2 
Hi Marek,

> Subject: Re: [PATCH 3/8] pinctrl: renesas: r8a7796: Optimize pinctrl image size
> for R8A774A1
> 
> On 10/28/20 11:34 AM, Biju Das wrote:
> > This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
> > Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
> > (R8A7796[01]) is not enabled.
> >
> > Based on the similar patch on Linux.
> 
> Is this patch now part of mainline Linux or is there a patchwork link?

This patch [1] is accepted by Renesas kernel maintainer and is hit on Renesas drivers linux kernel tree.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=renesas-pinctrl&id=ea750cfbb81cc45dee6fcb70b2f36db858f2d3ee

Regards,
Biju

> Applied, thanks
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index a92c8ad18c..da7901ea6e 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -1841,6 +1841,7 @@  static const unsigned int canfd1_data_mux[] = {
 	CANFD1_TX_MARK,         CANFD1_RX_MARK,
 };
 
+#if defined(CONFIG_PINCTRL_PFC_R8A7796)
 /* - DRIF0 --------------------------------------------------------------- */
 static const unsigned int drif0_ctrl_a_pins[] = {
 	/* CLK, SYNC */
@@ -2055,6 +2056,7 @@  static const unsigned int drif3_data1_b_pins[] = {
 static const unsigned int drif3_data1_b_mux[] = {
 	RIF3_D1_B_MARK,
 };
+#endif /* CONFIG_PINCTRL_PFC_R8A7796 */
 
 /* - DU --------------------------------------------------------------------- */
 static const unsigned int du_rgb666_pins[] = {
@@ -4113,7 +4115,9 @@  static const unsigned int vin5_clk_mux[] = {
 
 static const struct {
 	struct sh_pfc_pin_group common[312];
+#if defined(CONFIG_PINCTRL_PFC_R8A7796)
 	struct sh_pfc_pin_group automotive[30];
+#endif
 } pinmux_groups = {
 	.common = {
 		SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4429,6 +4433,7 @@  static const struct {
 		SH_PFC_PIN_GROUP(vin5_clkenb),
 		SH_PFC_PIN_GROUP(vin5_clk),
 	},
+#if defined(CONFIG_PINCTRL_PFC_R8A7796)
 	.automotive = {
 		SH_PFC_PIN_GROUP(drif0_ctrl_a),
 		SH_PFC_PIN_GROUP(drif0_data0_a),
@@ -4461,6 +4466,7 @@  static const struct {
 		SH_PFC_PIN_GROUP(drif3_data0_b),
 		SH_PFC_PIN_GROUP(drif3_data1_b),
 	}
+#endif /* CONFIG_PINCTRL_PFC_R8A7796 */
 };
 
 static const char * const audio_clk_groups[] = {
@@ -4519,6 +4525,7 @@  static const char * const canfd1_groups[] = {
 	"canfd1_data",
 };
 
+#if defined(CONFIG_PINCTRL_PFC_R8A7796)
 static const char * const drif0_groups[] = {
 	"drif0_ctrl_a",
 	"drif0_data0_a",
@@ -4560,6 +4567,7 @@  static const char * const drif3_groups[] = {
 	"drif3_data0_b",
 	"drif3_data1_b",
 };
+#endif /* CONFIG_PINCTRL_PFC_R8A7796 */
 
 static const char * const du_groups[] = {
 	"du_rgb666",
@@ -4966,7 +4974,9 @@  static const char * const vin5_groups[] = {
 
 static const struct {
 	struct sh_pfc_function common[49];
+#if defined(CONFIG_PINCTRL_PFC_R8A7796)
 	struct sh_pfc_function automotive[4];
+#endif
 } pinmux_functions = {
 	.common = {
 		SH_PFC_FUNCTION(audio_clk),
@@ -5019,12 +5029,14 @@  static const struct {
 		SH_PFC_FUNCTION(vin4),
 		SH_PFC_FUNCTION(vin5),
 	},
+#if defined(CONFIG_PINCTRL_PFC_R8A7796)
 	.automotive = {
 		SH_PFC_FUNCTION(drif0),
 		SH_PFC_FUNCTION(drif1),
 		SH_PFC_FUNCTION(drif2),
 		SH_PFC_FUNCTION(drif3),
 	}
+#endif /* CONFIG_PINCTRL_PFC_R8A7796 */
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {