| Message ID | 4a85487f-6b0c-59f7-cbc6-2361c9a9a3b6@monstr.eu |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [GIT,PULL] xilinx patches for v2021.01-v2 | expand |
On Thu, Oct 29, 2020 at 03:23:03PM +0100, Michal Simek wrote: > Hi Tom, > > please pull these patches to your tree. > Gitlab CI looks good > https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze/-/pipelines/5170 > Travis is still running and it is quite slow but I have been running > full build some days ago without any issue there too. > > Buildman run over all patches for xilinx platforms also not showing any > issue. > > There are some patches out of Xilinx area but related to do. > The first adds support for 64bit loadables from SPL to U-Boot. All of > them were reviewed by Simon. > > There are also changes for zynq-sdhci which were reviewed by Peng and > Jaehoon. > > Feel free to take a look below for more information. > > Thanks, > Michal > > > The following changes since commit c99e87f82803500f9811b1e98926d9d25df35b38: > > Merge branch '2020-10-23-misc-changes' (2020-10-24 10:49:28 -0400) > > are available in the Git repository at: > > git@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git > tags/xilinx-for-v2021.01-v2 > > for you to fetch changes up to 908daf86f96a44176ecd1e04f1ec71e143aa45f5: > > xilinx: Enable SPI driver for Versal (2020-10-29 08:55:43 +0100) > Applied to u-boot/master, thanks!
Hi Tom, please pull these patches to your tree. Gitlab CI looks good https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze/-/pipelines/5170 Travis is still running and it is quite slow but I have been running full build some days ago without any issue there too. Buildman run over all patches for xilinx platforms also not showing any issue. There are some patches out of Xilinx area but related to do. The first adds support for 64bit loadables from SPL to U-Boot. All of them were reviewed by Simon. There are also changes for zynq-sdhci which were reviewed by Peng and Jaehoon. Feel free to take a look below for more information. Thanks, Michal The following changes since commit c99e87f82803500f9811b1e98926d9d25df35b38: Merge branch '2020-10-23-misc-changes' (2020-10-24 10:49:28 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2021.01-v2 for you to fetch changes up to 908daf86f96a44176ecd1e04f1ec71e143aa45f5: xilinx: Enable SPI driver for Versal (2020-10-29 08:55:43 +0100) ---------------------------------------------------------------- Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x ---------------------------------------------------------------- Alexandre GRIVEAUX (1): ARM: zynq: Add Z-turn board V5 Ashok Reddy Soma (9): arm64: versal: Update mini u-boot eMMC node parameters config: versal: Update mini u-boot timer clock to 100Mhz spi: zynq_qspi: Add function description Revert "mmc: zynq: parse dt when probing" mmc: Define timing macro's mmc: zynq_sdhci: Set tapdelays based on clk phase delays mmc: zynq_sdhci: Add clock phase delays for Versal mmc: zynq_sdhci: Extend UHS timings till hs200 mmc: zynq_sdhci: Add common function to set input/output tapdelays Michal Simek (45): MAINTAINERS: Record documentation for Xilinx platforms doc: board: xilinx: zynq.rst: Update zynq documentation doc: board: xilinx: Update links to DT binding docs doc: board: xilinx: Add documentation for ZynqMP doc: board: xilinx: Add documentation for ZynqMP R5 arm64: zynqmp: Add missing support for 9cg version arm64: zynqmp: Enable EMMC boot spi: xilinx_spi: Remove unused variable firmware: zynqmp: Swap addr_hi/low when PM_FPGA_LOAD is called mailbox: zynqmp: Extend timeout for getting observation bit arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf arm64: zynqmp: Enable FPGA loading from SPL arm64: zynqmp: Enable cache command arm64: zynqmp: Get rid of iommus/power-domains properties for SPL DT arm64: zynqmp: Add support for saving sha3 key to different address dt-bindings: arm64: versal: Add clk and power headers dm: core: Add support for getting node from aliases xilinx: board: Read the whole eeprom not just offset xilinx: board: Add support for additional card detection serial: pl01x: Add error value checking spl: Use standard FIT entries spl: fdt: Record load/entry fit-images entries in 64bit format xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board Kconfig xilinx: common: Protect board_late_init_xilinx() microblaze: Enable i2c DM by default xilinx: common: Add Makefile to common folder xilinx: cmd: Add basic fru format generator xilinx: board: Add FRU decoder support xilinx: zynqmp: Check return value from xilinx_pm_request() xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name() xilinx: zynqmp: Do not check 0 as invalid return from snprintf xilinx: zynqmp: Use tab for macro indentation xilinx: Enable FRU command for all ARM based platforms xilinx: zynq: Change types from u32 to uint32_t xilinx: zynq: Enable AES command xilinx: Enable SF_TEST command for all ARM based platforms xilinx: Remove additional newline in config files xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM microblaze: Wire generic xilinx board_late_init_xilinx() microblaze: Enable board_late_init() mtd: spi: Fix incorrect indentation mmc: zynq_sdhci: Move macro to the top mmc: zynq_sdhci: Read clock phase delays from dt xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms xilinx: Enable SPI driver for Versal Ovidiu Panait (2): microblaze: start.S: Factor out exception setup code to __setup_exceptions microblaze: start.S: Use board_init_f_alloc/init in early init Siva Durga Prasad Paladugu (2): arm64: zynqmp: Add support for encryption and decryption on data blob xilinx: cmd: Add support for FRU commands T Karthik Reddy (12): microblaze: Enable spi for microblaze microblaze: trivial code fixes microblaze: board: Check return value whlie saving env variables microblaze: Setup distro boot env variables at run time microblaze: Add support for distro boot arm64: zynqmp: Add support for RSA command arm64: zynqmp: Add support for SHA3 command spi: xilinx_spi: remove unused local variable spi: zynq_spi: Use clk subsystem to get reference spi clk spi: zynq_qspi: Use clk subsystem to get reference qspi clk arm64: zynqmp: Fix zynqmp mini qspi max frequency xilinx: Add DDR base address to bootscript address MAINTAINERS | 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/versal-mini-emmc0.dts | 9 ++-- arch/arm/dts/versal-mini-emmc1.dts | 9 ++-- arch/arm/dts/zynq-zturn-common.dtsi | 120 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/zynq-zturn-v5.dts | 15 ++++++ arch/arm/dts/zynq-zturn.dts | 109 +------------------------------------- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- arch/arm/mach-zynq/spl.c | 14 ----- arch/arm/mach-zynqmp/include/mach/sys_proto.h | 10 ++++ arch/arm/mach-zynqmp/spl.c | 10 ---- arch/microblaze/Kconfig | 4 ++ arch/microblaze/cpu/start.S | 209 +++++++++++++++++++++++++++++++++++++----------------------------------- board/xilinx/Kconfig | 31 +++++++++-- board/xilinx/common/Makefile | 10 ++++ board/xilinx/common/board.c | 347 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- board/xilinx/common/board.h | 2 + board/xilinx/common/fru.c | 91 ++++++++++++++++++++++++++++++++ board/xilinx/common/fru.h | 83 +++++++++++++++++++++++++++++ board/xilinx/common/fru_ops.c | 362 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/microblaze-generic/microblaze-generic.c | 23 +++++--- board/xilinx/versal/Makefile | 1 - board/xilinx/versal/board.c | 3 ++ board/xilinx/zynq/Makefile | 1 - board/xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c | 273 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/MAINTAINERS | 1 + board/xilinx/zynqmp/Makefile | 1 - board/xilinx/zynqmp/cmds.c | 228 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- board/xilinx/zynqmp/tap_delays.c | 200 ++++++++++++--------------------------------------------------------- board/xilinx/zynqmp/zynqmp.c | 32 +++++++---- common/fdt_support.c | 9 +--- common/image-fit.c | 11 ++-- common/spl/spl_atf.c | 7 +-- common/spl/spl_fit.c | 8 ++- common/spl/spl_opensbi.c | 8 ++- configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 3 +- configs/microblaze-generic_defconfig | 15 ++++-- configs/syzygy_hub_defconfig | 3 +- configs/xilinx_versal_mini_defconfig | 2 +- configs/xilinx_versal_mini_emmc0_defconfig | 2 +- configs/xilinx_versal_mini_emmc1_defconfig | 2 +- configs/xilinx_versal_virt_defconfig | 6 ++- configs/xilinx_zynq_virt_defconfig | 7 ++- configs/xilinx_zynqmp_virt_defconfig | 8 ++- doc/board/xilinx/index.rst | 2 + doc/board/xilinx/xilinx.rst | 16 ++++-- doc/board/xilinx/zynq.rst | 7 +-- doc/board/xilinx/zynqmp-r5.rst | 137 +++++++++++++++++++++++++++++++++++++++++++++++ doc/board/xilinx/zynqmp.rst | 115 ++++++++++++++++++++++++++++++++++++++++ doc/uImage.FIT/howto.txt | 84 +++++++++++++++++++++++++++++ drivers/core/ofnode.c | 22 ++++++++ drivers/firmware/firmware-zynqmp.c | 8 +++ drivers/mailbox/zynqmp-ipi.c | 2 +- drivers/misc/Kconfig | 7 --- drivers/mmc/sdhci.c | 3 +- drivers/mmc/zynq_sdhci.c | 406 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------- drivers/mtd/spi/sf_internal.h | 2 +- drivers/serial/serial_pl01x.c | 13 ++++- drivers/spi/xilinx_spi.c | 8 +-- drivers/spi/zynq_qspi.c | 84 ++++++++++++++++++++++------- drivers/spi/zynq_spi.c | 35 +++++++++--- include/configs/microblaze-generic.h | 69 +++++++++++++++++++----- include/configs/xilinx_versal.h | 1 - include/configs/xilinx_versal_mini.h | 1 - include/configs/xilinx_zynqmp_mini.h | 1 - include/dm/ofnode.h | 22 ++++++++ include/dt-bindings/clock/xlnx-versal-clk.h | 123 +++++++++++++++++++++++++++++++++++++++++++ include/dt-bindings/power/xlnx-versal-power.h | 42 +++++++++++++++ include/mmc.h | 13 +++++ include/sdhci.h | 1 + include/u-boot/rsa-mod-exp.h | 2 +- include/zynqmp_tap_delay.h | 5 +- lib/rsa/rsa-mod-exp.c | 2 +- test/dm/ofnode.c | 22 ++++++++ 74 files changed, 2987 insertions(+), 561 deletions(-) create mode 100644 arch/arm/dts/zynq-zturn-common.dtsi create mode 100644 arch/arm/dts/zynq-zturn-v5.dts create mode 100644 board/xilinx/common/Makefile create mode 100644 board/xilinx/common/fru.c create mode 100644 board/xilinx/common/fru.h create mode 100644 board/xilinx/common/fru_ops.c create mode 100644 board/xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c create mode 100644 doc/board/xilinx/zynqmp-r5.rst create mode 100644 doc/board/xilinx/zynqmp.rst create mode 100644 include/dt-bindings/clock/xlnx-versal-clk.h create mode 100644 include/dt-bindings/power/xlnx-versal-power.h