| Message ID | 20200920112914.26501-30-Sergey.Semin@baikalelectronics.ru |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | spi: dw: Add full Baikal-T1 SPI Controllers support | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success |
On Sun, 20 Sep 2020 14:29:13 +0300, Serge Semin wrote: > These controllers are based on the DW APB SSI IP-core and embedded into > the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4 > native CS, while another one as being utilized by the Baikal-T1 System > Boot Controller has got a very limited resources: no IRQ, no DMA, only a > single native chip-select and just 8 bytes Tx/Rx FIFOs available. That's > why we have to mark the IRQ to be optional for the later interface. > > The SPI controller embedded into the Baikal-T1 System Boot Controller can > be also used to directly access an external SPI flash by means of a > dedicated FSM. The corresponding MMIO region availability is switchable by > the embedded multiplexor, which phandle can be specified in the dts node. > > * We added a new example to test out the non-standard Baikal-T1 System > Boot SPI Controller DT binding. > > Co-developed-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> > Signed-off-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > --- > .../bindings/spi/snps,dw-apb-ssi.yaml | 33 +++++++++++++++++-- > 1 file changed, 31 insertions(+), 2 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index c62cbe79f00d..d6ae35777dac 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -22,6 +22,21 @@ allOf: properties: reg: minItems: 2 + - if: + properties: + compatible: + contains: + enum: + - baikal,bt1-sys-ssi + then: + properties: + mux-controls: + maxItems: 1 + required: + - mux-controls + else: + required: + - interrupts properties: compatible: @@ -44,12 +59,16 @@ properties: - const: snps,dw-apb-ssi - description: Intel Keem Bay SPI Controller const: intel,keembay-ssi + - description: Baikal-T1 SPI Controller + const: baikal,bt1-ssi + - description: Baikal-T1 System Boot SPI Controller + const: baikal,bt1-sys-ssi reg: minItems: 1 items: - description: DW APB SSI controller memory mapped registers - - description: SPI MST region map + - description: SPI MST region map or directly mapped SPI ROM interrupts: maxItems: 1 @@ -114,7 +133,6 @@ required: - reg - "#address-cells" - "#size-cells" - - interrupts - clocks examples: @@ -130,4 +148,15 @@ examples: cs-gpios = <&gpio0 13 0>, <&gpio0 14 0>; }; + - | + spi@1f040100 { + compatible = "baikal,bt1-sys-ssi"; + reg = <0x1f040100 0x900>, + <0x1c000000 0x1000000>; + #address-cells = <1>; + #size-cells = <0>; + mux-controls = <&boot_mux>; + clocks = <&ccu_sys>; + clock-names = "ssi_clk"; + }; ...