| Message ID | 20200817043431.28718-16-chee.hong.ang@intel.com |
|---|---|
| State | Deferred |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Enable ARM Trusted Firmware for U-Boot | expand |
> -----Original Message----- > From: Ang, Chee Hong <chee.hong.ang@intel.com> > Sent: Monday, August 17, 2020 12:35 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>; See, > Chin Liang <chin.liang.see@intel.com>; Tan, Ley Foon > <ley.foon.tan@intel.com>; Ang, Chee Hong <chee.hong.ang@intel.com>; > Chee, Tien Fong <tien.fong.chee@intel.com>; Lim, Elly Siew Chin > <elly.siew.chin.lim@intel.com> > Subject: [PATCH v1 15/16] arm: socfpga: soc64: Skip handoff data access in > SSBL > > SPL already setup the Clock Manager with the handoff data from OCRAM. > When the Clock Manager's driver get probed again in SSBL, it shall skip the > handoff data access in OCRAM. > > Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> > --- > arch/arm/mach-socfpga/wrap_pll_config_s10.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c > b/arch/arm/mach-socfpga/wrap_pll_config_s10.c > index 3da85791a1..049c5711a8 100644 > --- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c > +++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c > @@ -12,6 +12,7 @@ > > const struct cm_config * const cm_get_default_config(void) { > +#ifdef CONFIG_SPL_BUILD > struct cm_config *cm_handoff_cfg = (struct cm_config *) > (S10_HANDOFF_CLOCK + S10_HANDOFF_OFFSET_DATA); > u32 *conversion = (u32 *)cm_handoff_cfg; @@ -26,7 +27,7 @@ > const struct cm_config * const cm_get_default_config(void) > } else if (handoff_clk == S10_HANDOFF_MAGIC_CLOCK) { > return cm_handoff_cfg; > } > - > +#endif > return NULL; > } Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c b/arch/arm/mach-socfpga/wrap_pll_config_s10.c index 3da85791a1..049c5711a8 100644 --- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c +++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c @@ -12,6 +12,7 @@ const struct cm_config * const cm_get_default_config(void) { +#ifdef CONFIG_SPL_BUILD struct cm_config *cm_handoff_cfg = (struct cm_config *) (S10_HANDOFF_CLOCK + S10_HANDOFF_OFFSET_DATA); u32 *conversion = (u32 *)cm_handoff_cfg; @@ -26,7 +27,7 @@ const struct cm_config * const cm_get_default_config(void) } else if (handoff_clk == S10_HANDOFF_MAGIC_CLOCK) { return cm_handoff_cfg; } - +#endif return NULL; }
SPL already setup the Clock Manager with the handoff data from OCRAM. When the Clock Manager's driver get probed again in SSBL, it shall skip the handoff data access in OCRAM. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> --- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)