Message ID | 20200825092124.4284-10-dariobin@libero.it |
---|---|
State | Changes Requested |
Delegated to: | Lokesh Vutla |
Headers | show |
Series | Add DM support for omap PWM backlight | expand |
On 25/08/20 2:51 pm, Dario Binacchi wrote: > The patch removes duplicate routines used by the two drivers. > > Signed-off-by: Dario Binacchi <dariobin@libero.it> Please squash it into previous patches. Thanks and regards, Lokesh > --- > > drivers/clk/Makefile | 1 + > drivers/clk/clk-ti-divider.c | 27 ++------------------------- > drivers/clk/clk-ti-mux.c | 27 ++------------------------- > drivers/clk/clk-ti.c | 34 ++++++++++++++++++++++++++++++++++ > drivers/clk/clk-ti.h | 13 +++++++++++++ > 5 files changed, 52 insertions(+), 50 deletions(-) > create mode 100644 drivers/clk/clk-ti.c > create mode 100644 drivers/clk/clk-ti.h > > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index 0fcfcc1837..21b1e9c364 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ > obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ > obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ > obj-$(CONFIG_ARCH_MESON) += meson/ > +obj-$(CONFIG_ARCH_OMAP2PLUS) += clk-ti.o > obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ > obj-$(CONFIG_ARCH_SOCFPGA) += altera/ > obj-$(CONFIG_CLK_AT91) += at91/ > diff --git a/drivers/clk/clk-ti-divider.c b/drivers/clk/clk-ti-divider.c > index fa9d60a2d5..d16cc30cb7 100644 > --- a/drivers/clk/clk-ti-divider.c > +++ b/drivers/clk/clk-ti-divider.c > @@ -16,6 +16,7 @@ > #include <linux/clk-provider.h> > #include <linux/kernel.h> > #include <linux/log2.h> > +#include "clk-ti.h" > > /* > * The reverse of DIV_ROUND_UP: The maximum number which > @@ -36,30 +37,6 @@ struct clk_ti_divider_priv { > u16 mask; > }; > > -static void clk_ti_divider_rmw(u32 val, u32 mask, fdt_addr_t reg) > -{ > - u32 v; > - > - v = readl(reg); > - v &= ~mask; > - v |= val; > - writel(v, reg); > -} > - > -static void clk_ti_divider_latch(fdt_addr_t reg, s8 shift) > -{ > - u32 latch; > - > - if (shift < 0) > - return; > - > - latch = 1 << shift; > - > - clk_ti_divider_rmw(latch, latch, reg); > - clk_ti_divider_rmw(0, latch, reg); > - readl(reg); /* OCP barrier */ > -} > - > static unsigned int _get_div(const struct clk_div_table *table, ulong flags, > unsigned int val) > { > @@ -226,7 +203,7 @@ static ulong clk_ti_divider_set_rate(struct clk *clk, ulong rate) > v &= ~(priv->mask << priv->shift); > v |= val << priv->shift; > writel(v, priv->reg); > - clk_ti_divider_latch(priv->reg, priv->latch); > + clk_ti_latch(priv->reg, priv->latch); > > return clk_get_rate(clk); > } > diff --git a/drivers/clk/clk-ti-mux.c b/drivers/clk/clk-ti-mux.c > index 7e39dd3477..e4b190bbcc 100644 > --- a/drivers/clk/clk-ti-mux.c > +++ b/drivers/clk/clk-ti-mux.c > @@ -12,6 +12,7 @@ > #include <clk-uclass.h> > #include <asm/io.h> > #include <linux/clk-provider.h> > +#include "clk-ti.h" > > struct clk_ti_mux_priv { > struct clk_bulk parents; > @@ -23,30 +24,6 @@ struct clk_ti_mux_priv { > s32 latch; > }; > > -static void clk_ti_mux_rmw(u32 val, u32 mask, fdt_addr_t reg) > -{ > - u32 v; > - > - v = readl(reg); > - v &= ~mask; > - v |= val; > - writel(v, reg); > -} > - > -static void clk_ti_mux_latch(fdt_addr_t reg, s8 shift) > -{ > - u32 latch; > - > - if (shift < 0) > - return; > - > - latch = 1 << shift; > - > - clk_ti_mux_rmw(latch, latch, reg); > - clk_ti_mux_rmw(0, latch, reg); > - readl(reg); /* OCP barrier */ > -} > - > static struct clk *clk_ti_mux_get_parent_by_index(struct clk_bulk *parents, > int index) > { > @@ -119,7 +96,7 @@ static int clk_ti_mux_set_parent(struct clk *clk, struct clk *parent) > > val |= index << priv->shift; > writel(val, priv->reg); > - clk_ti_mux_latch(priv->reg, priv->latch); > + clk_ti_latch(priv->reg, priv->latch); > return 0; > } > > diff --git a/drivers/clk/clk-ti.c b/drivers/clk/clk-ti.c > new file mode 100644 > index 0000000000..594ef75270 > --- /dev/null > +++ b/drivers/clk/clk-ti.c > @@ -0,0 +1,34 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * TI clock utilities > + * > + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> > + */ > + > +#include <common.h> > +#include <asm/io.h> > +#include "clk-ti.h" > + > +static void clk_ti_rmw(u32 val, u32 mask, fdt_addr_t reg) > +{ > + u32 v; > + > + v = readl(reg); > + v &= ~mask; > + v |= val; > + writel(v, reg); > +} > + > +void clk_ti_latch(fdt_addr_t reg, s8 shift) > +{ > + u32 latch; > + > + if (shift < 0) > + return; > + > + latch = 1 << shift; > + > + clk_ti_rmw(latch, latch, reg); > + clk_ti_rmw(0, latch, reg); > + readl(reg); /* OCP barrier */ > +} > diff --git a/drivers/clk/clk-ti.h b/drivers/clk/clk-ti.h > new file mode 100644 > index 0000000000..601c3823f7 > --- /dev/null > +++ b/drivers/clk/clk-ti.h > @@ -0,0 +1,13 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * TI clock utilities header > + * > + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> > + */ > + > +#ifndef _CLK_TI_H > +#define _CLK_TI_H > + > +void clk_ti_latch(fdt_addr_t reg, s8 shift); > + > +#endif /* #ifndef _CLK_TI_H */ >
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 0fcfcc1837..21b1e9c364 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ obj-$(CONFIG_ARCH_MESON) += meson/ +obj-$(CONFIG_ARCH_OMAP2PLUS) += clk-ti.o obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ obj-$(CONFIG_CLK_AT91) += at91/ diff --git a/drivers/clk/clk-ti-divider.c b/drivers/clk/clk-ti-divider.c index fa9d60a2d5..d16cc30cb7 100644 --- a/drivers/clk/clk-ti-divider.c +++ b/drivers/clk/clk-ti-divider.c @@ -16,6 +16,7 @@ #include <linux/clk-provider.h> #include <linux/kernel.h> #include <linux/log2.h> +#include "clk-ti.h" /* * The reverse of DIV_ROUND_UP: The maximum number which @@ -36,30 +37,6 @@ struct clk_ti_divider_priv { u16 mask; }; -static void clk_ti_divider_rmw(u32 val, u32 mask, fdt_addr_t reg) -{ - u32 v; - - v = readl(reg); - v &= ~mask; - v |= val; - writel(v, reg); -} - -static void clk_ti_divider_latch(fdt_addr_t reg, s8 shift) -{ - u32 latch; - - if (shift < 0) - return; - - latch = 1 << shift; - - clk_ti_divider_rmw(latch, latch, reg); - clk_ti_divider_rmw(0, latch, reg); - readl(reg); /* OCP barrier */ -} - static unsigned int _get_div(const struct clk_div_table *table, ulong flags, unsigned int val) { @@ -226,7 +203,7 @@ static ulong clk_ti_divider_set_rate(struct clk *clk, ulong rate) v &= ~(priv->mask << priv->shift); v |= val << priv->shift; writel(v, priv->reg); - clk_ti_divider_latch(priv->reg, priv->latch); + clk_ti_latch(priv->reg, priv->latch); return clk_get_rate(clk); } diff --git a/drivers/clk/clk-ti-mux.c b/drivers/clk/clk-ti-mux.c index 7e39dd3477..e4b190bbcc 100644 --- a/drivers/clk/clk-ti-mux.c +++ b/drivers/clk/clk-ti-mux.c @@ -12,6 +12,7 @@ #include <clk-uclass.h> #include <asm/io.h> #include <linux/clk-provider.h> +#include "clk-ti.h" struct clk_ti_mux_priv { struct clk_bulk parents; @@ -23,30 +24,6 @@ struct clk_ti_mux_priv { s32 latch; }; -static void clk_ti_mux_rmw(u32 val, u32 mask, fdt_addr_t reg) -{ - u32 v; - - v = readl(reg); - v &= ~mask; - v |= val; - writel(v, reg); -} - -static void clk_ti_mux_latch(fdt_addr_t reg, s8 shift) -{ - u32 latch; - - if (shift < 0) - return; - - latch = 1 << shift; - - clk_ti_mux_rmw(latch, latch, reg); - clk_ti_mux_rmw(0, latch, reg); - readl(reg); /* OCP barrier */ -} - static struct clk *clk_ti_mux_get_parent_by_index(struct clk_bulk *parents, int index) { @@ -119,7 +96,7 @@ static int clk_ti_mux_set_parent(struct clk *clk, struct clk *parent) val |= index << priv->shift; writel(val, priv->reg); - clk_ti_mux_latch(priv->reg, priv->latch); + clk_ti_latch(priv->reg, priv->latch); return 0; } diff --git a/drivers/clk/clk-ti.c b/drivers/clk/clk-ti.c new file mode 100644 index 0000000000..594ef75270 --- /dev/null +++ b/drivers/clk/clk-ti.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * TI clock utilities + * + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> + */ + +#include <common.h> +#include <asm/io.h> +#include "clk-ti.h" + +static void clk_ti_rmw(u32 val, u32 mask, fdt_addr_t reg) +{ + u32 v; + + v = readl(reg); + v &= ~mask; + v |= val; + writel(v, reg); +} + +void clk_ti_latch(fdt_addr_t reg, s8 shift) +{ + u32 latch; + + if (shift < 0) + return; + + latch = 1 << shift; + + clk_ti_rmw(latch, latch, reg); + clk_ti_rmw(0, latch, reg); + readl(reg); /* OCP barrier */ +} diff --git a/drivers/clk/clk-ti.h b/drivers/clk/clk-ti.h new file mode 100644 index 0000000000..601c3823f7 --- /dev/null +++ b/drivers/clk/clk-ti.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * TI clock utilities header + * + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> + */ + +#ifndef _CLK_TI_H +#define _CLK_TI_H + +void clk_ti_latch(fdt_addr_t reg, s8 shift); + +#endif /* #ifndef _CLK_TI_H */
The patch removes duplicate routines used by the two drivers. Signed-off-by: Dario Binacchi <dariobin@libero.it> --- drivers/clk/Makefile | 1 + drivers/clk/clk-ti-divider.c | 27 ++------------------------- drivers/clk/clk-ti-mux.c | 27 ++------------------------- drivers/clk/clk-ti.c | 34 ++++++++++++++++++++++++++++++++++ drivers/clk/clk-ti.h | 13 +++++++++++++ 5 files changed, 52 insertions(+), 50 deletions(-) create mode 100644 drivers/clk/clk-ti.c create mode 100644 drivers/clk/clk-ti.h