diff mbox series

[v2,1/2] dt-bindings: pci: tegra: Remove PLL power supplies

Message ID 20200623145528.1658337-1-thierry.reding@gmail.com
State Deferred
Headers show
Series [v2,1/2] dt-bindings: pci: tegra: Remove PLL power supplies | expand

Commit Message

Thierry Reding June 23, 2020, 2:55 p.m. UTC
From: Thierry Reding <treding@nvidia.com>

The XUSB pad controller, which provides access to various USB, PCI and
SATA pads (or PHYs), needs to bring up the PLLs associated with these
pads. In order to properly do so, it needs to control the power supplied
to these PLLs.

Remove the PLL power supplies from the PCIe controller because it does
not need direct access to them. Instead it will only use the configured
pads provided by the XUSB pad controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Hi Rob,

I already made this change as part of the conversion series, but wanted
to send this out as part of this subseries since it addresses a fairly
long-standing issue that I'd like to clean up irrespective of the DT
binding conversion. Since it looks like the conversion series will take
a bit longer, I think it makes sense to send this out separately.

Thierry

 .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
 1 file changed, 12 deletions(-)

Comments

Thierry Reding July 16, 2020, 12:59 p.m. UTC | #1
On Tue, Jun 23, 2020 at 04:55:27PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The XUSB pad controller, which provides access to various USB, PCI and
> SATA pads (or PHYs), needs to bring up the PLLs associated with these
> pads. In order to properly do so, it needs to control the power supplied
> to these PLLs.
> 
> Remove the PLL power supplies from the PCIe controller because it does
> not need direct access to them. Instead it will only use the configured
> pads provided by the XUSB pad controller.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Hi Rob,
> 
> I already made this change as part of the conversion series, but wanted
> to send this out as part of this subseries since it addresses a fairly
> long-standing issue that I'd like to clean up irrespective of the DT
> binding conversion. Since it looks like the conversion series will take
> a bit longer, I think it makes sense to send this out separately.
> 
> Thierry
> 
>  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
>  1 file changed, 12 deletions(-)

Hi Rob, any feedback on this?

Thanks,
Thierry

> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> index 7939bca47861..d099f3476ccc 100644
> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> @@ -112,28 +112,16 @@ Power supplies for Tegra124:
>  - Required:
>    - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
>    - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
>      Must supply 3.3 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 2.8-3.3 V.
> -  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>  
>  Power supplies for Tegra210:
>  - Required:
> -  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>    - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
>      clocks. Must supply 1.8 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 1.8 V.
>  
> -- 
> 2.27.0
>
Lorenzo Pieralisi July 17, 2020, 10:48 a.m. UTC | #2
On Thu, Jul 16, 2020 at 02:59:45PM +0200, Thierry Reding wrote:
> On Tue, Jun 23, 2020 at 04:55:27PM +0200, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The XUSB pad controller, which provides access to various USB, PCI and
> > SATA pads (or PHYs), needs to bring up the PLLs associated with these
> > pads. In order to properly do so, it needs to control the power supplied
> > to these PLLs.
> > 
> > Remove the PLL power supplies from the PCIe controller because it does
> > not need direct access to them. Instead it will only use the configured
> > pads provided by the XUSB pad controller.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Hi Rob,
> > 
> > I already made this change as part of the conversion series, but wanted
> > to send this out as part of this subseries since it addresses a fairly
> > long-standing issue that I'd like to clean up irrespective of the DT
> > binding conversion. Since it looks like the conversion series will take
> > a bit longer, I think it makes sense to send this out separately.
> > 
> > Thierry
> > 
> >  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
> >  1 file changed, 12 deletions(-)
> 
> Hi Rob, any feedback on this?

Hi Rob,

I'd like to queue both patches, please let me know if that's OK with
you.

Thank you very much.

Lorenzo

> > index 7939bca47861..d099f3476ccc 100644
> > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > @@ -112,28 +112,16 @@ Power supplies for Tegra124:
> >  - Required:
> >    - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
> >    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> > -  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> > -    supply 1.05 V.
> >    - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
> >      Must supply 3.3 V.
> > -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> > -    Must supply 3.3 V.
> >    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
> >      supply 2.8-3.3 V.
> > -  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
> > -    supply 1.05 V.
> >  
> >  Power supplies for Tegra210:
> >  - Required:
> > -  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
> > -    supply 1.05 V.
> >    - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
> >      clocks. Must supply 1.8 V.
> >    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> > -  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> > -    supply 1.05 V.
> > -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> > -    Must supply 3.3 V.
> >    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
> >      supply 1.8 V.
> >  
> > -- 
> > 2.27.0
> >
Rob Herring July 27, 2020, 4:17 p.m. UTC | #3
On Tue, Jun 23, 2020 at 8:55 AM Thierry Reding <thierry.reding@gmail.com> wrote:
>
> From: Thierry Reding <treding@nvidia.com>
>
> The XUSB pad controller, which provides access to various USB, PCI and
> SATA pads (or PHYs), needs to bring up the PLLs associated with these
> pads. In order to properly do so, it needs to control the power supplied
> to these PLLs.
>
> Remove the PLL power supplies from the PCIe controller because it does
> not need direct access to them. Instead it will only use the configured
> pads provided by the XUSB pad controller.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Hi Rob,
>
> I already made this change as part of the conversion series, but wanted
> to send this out as part of this subseries since it addresses a fairly
> long-standing issue that I'd like to clean up irrespective of the DT
> binding conversion. Since it looks like the conversion series will take
> a bit longer, I think it makes sense to send this out separately.
>
> Thierry
>
>  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
>  1 file changed, 12 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>
Lorenzo Pieralisi July 28, 2020, 10:20 a.m. UTC | #4
On Tue, Jun 23, 2020 at 04:55:27PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The XUSB pad controller, which provides access to various USB, PCI and
> SATA pads (or PHYs), needs to bring up the PLLs associated with these
> pads. In order to properly do so, it needs to control the power supplied
> to these PLLs.
> 
> Remove the PLL power supplies from the PCIe controller because it does
> not need direct access to them. Instead it will only use the configured
> pads provided by the XUSB pad controller.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Hi Rob,
> 
> I already made this change as part of the conversion series, but wanted
> to send this out as part of this subseries since it addresses a fairly
> long-standing issue that I'd like to clean up irrespective of the DT
> binding conversion. Since it looks like the conversion series will take
> a bit longer, I think it makes sense to send this out separately.

Applied the series to pci/tegra, thanks.

Lorenzo

> Thierry
> 
>  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
>  1 file changed, 12 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> index 7939bca47861..d099f3476ccc 100644
> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> @@ -112,28 +112,16 @@ Power supplies for Tegra124:
>  - Required:
>    - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
>    - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
>      Must supply 3.3 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 2.8-3.3 V.
> -  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>  
>  Power supplies for Tegra210:
>  - Required:
> -  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>    - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
>      clocks. Must supply 1.8 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 1.8 V.
>  
> -- 
> 2.27.0
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 7939bca47861..d099f3476ccc 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -112,28 +112,16 @@  Power supplies for Tegra124:
 - Required:
   - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
   - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
-  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
-    supply 1.05 V.
   - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
     Must supply 3.3 V.
-  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
-    Must supply 3.3 V.
   - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
     supply 2.8-3.3 V.
-  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
-    supply 1.05 V.
 
 Power supplies for Tegra210:
 - Required:
-  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
-    supply 1.05 V.
   - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
     clocks. Must supply 1.8 V.
   - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
-  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
-    supply 1.05 V.
-  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
-    Must supply 3.3 V.
   - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
     supply 1.8 V.