diff mbox series

[v1,3/3] cpuidle: tegra: Support CPU cluster power-down state on Tegra30

Message ID 20200324224335.5825-4-digetx@gmail.com
State Deferred
Headers show
Series Enable LP2 CPUIDLE state on NVIDIA Tegra30 | expand

Commit Message

Dmitry Osipenko March 24, 2020, 10:43 p.m. UTC 
The new Tegra CPU Idle driver now has a unified code path for the coupled
CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30
SoC where the whole CPU cluster is power-gated.

Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/cpuidle/cpuidle-tegra.c | 1 -
 1 file changed, 1 deletion(-)

Comments

Thierry Reding May 6, 2020, 4:33 p.m. UTC | #1 
On Wed, Mar 25, 2020 at 01:43:35AM +0300, Dmitry Osipenko wrote:
> The new Tegra CPU Idle driver now has a unified code path for the coupled
> CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30
> SoC where the whole CPU cluster is power-gated.
> 
> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> Tested-by: Jasper Korten <jja2000@gmail.com>
> Tested-by: David Heidelberg <david@ixit.cz>
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/cpuidle/cpuidle-tegra.c | 1 -
>  1 file changed, 1 deletion(-)

Daniel,

do you mind if I pick this up into the Tegra tree because of the runtime
dependencies on the firmware and ARM core changes in patches 1 & 2?

Thierry
Daniel Lezcano May 22, 2020, 4:42 p.m. UTC | #2 
On 24/03/2020 23:43, Dmitry Osipenko wrote:
> The new Tegra CPU Idle driver now has a unified code path for the coupled
> CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30
> SoC where the whole CPU cluster is power-gated.
> 
> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> Tested-by: Jasper Korten <jja2000@gmail.com>
> Tested-by: David Heidelberg <david@ixit.cz>
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Daniel Lezcano May 22, 2020, 4:42 p.m. UTC | #3 
On 06/05/2020 18:33, Thierry Reding wrote:
> On Wed, Mar 25, 2020 at 01:43:35AM +0300, Dmitry Osipenko wrote:
>> The new Tegra CPU Idle driver now has a unified code path for the coupled
>> CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30
>> SoC where the whole CPU cluster is power-gated.
>>
>> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
>> Tested-by: Jasper Korten <jja2000@gmail.com>
>> Tested-by: David Heidelberg <david@ixit.cz>
>> Tested-by: Peter Geis <pgwipeout@gmail.com>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>>  drivers/cpuidle/cpuidle-tegra.c | 1 -
>>  1 file changed, 1 deletion(-)
> 
> Daniel,
> 
> do you mind if I pick this up into the Tegra tree because of the runtime
> dependencies on the firmware and ARM core changes in patches 1 & 2?

Sorry for the late reply, I'm overbooked this cycle.
diff mbox series

Patch

diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c
index 313b0290e97b..150045849d78 100644
--- a/drivers/cpuidle/cpuidle-tegra.c
+++ b/drivers/cpuidle/cpuidle-tegra.c
@@ -365,7 +365,6 @@  static int tegra_cpuidle_probe(struct platform_device *pdev)
 		break;
 
 	case TEGRA30:
-		tegra_cpuidle_disable_state(TEGRA_CC6);
 		break;
 
 	case TEGRA114: