| Message ID | 20200519070346.24479-1-pragnesh.patel@sifive.com |
|---|---|
| Headers | show |
| Series | RISC-V SiFive FU540 support SPL | expand |
Hi Bin > -----Original Message----- > From: Bin Meng [mailto:bmeng.cn@gmail.com] > Sent: Tuesday, May 19, 2020 4:44 PM > To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) > Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > > Hi Rick, > > On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: > > > > This series add support for SPL to FU540. U-Boot SPL can boot from > > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and > > U-Boot proper from MMC devices. > > > > This series depends on: > > [1] https://patchwork.ozlabs.org/patch/1281853 > > [2] https://patchwork.ozlabs.org/patch/1281852 > > > > All these together is available for testing here [3] [3] > > https://github.com/pragnesh26992/u-boot/tree/spl > > > > How to test this patch: > > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y > > 2) export > > OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic.bi > > n> > > 3) Change to u-boot-dir > > 4) make sifive_fu540_defconfig > > 5) make all > > 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk > > to switch) > > > > # sudo sgdisk --clear \ > > > --set-alignment=2 \ > > > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ > > > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > > > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > > > /dev/sda > > > > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 > > > > Changes in v11: > > - Remove TPL related code and OF_PLATDATA from FU540 > > DDR driver (drivers/ram/sifive/fu540_ddr.c) > > - Update FU540 doc (doc/board/sifive/fu540.rst) > > Remove unnecessary print > > Could we get this v11 applied as soon as possible for v2020.07? No problem, if everything is OK, I will applied ASAP. But Jagan seem have some responses, please check about it. > > > This series depends on: > > [1] https://patchwork.ozlabs.org/patch/1281853 > > [2] https://patchwork.ozlabs.org/patch/1281852 > > Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? Yes, the reason is that the CI verification of v10 of this series "riscv: Add Sipeed Maix support" still fail. Please check the discussion of [v10,20/21] doc: riscv: Add documentation for Sipeed Maix Bit https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-21-seanga2@gmail.com/ That is why I still not pull it yet. Thanks, Rick > > Regards, > Bin
On 5/19/20 11:07 PM, Rick Chen wrote: > Hi Bin > >> -----Original Message----- >> From: Bin Meng [mailto:bmeng.cn@gmail.com] >> Sent: Tuesday, May 19, 2020 4:44 PM >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> Hi Rick, >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: >>> >>> This series add support for SPL to FU540. U-Boot SPL can boot from >>> L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and >>> U-Boot proper from MMC devices. >>> >>> This series depends on: >>> [1] https://patchwork.ozlabs.org/patch/1281853 >>> [2] https://patchwork.ozlabs.org/patch/1281852 >>> >>> All these together is available for testing here [3] [3] >>> https://github.com/pragnesh26992/u-boot/tree/spl >>> >>> How to test this patch: >>> 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y >>> 2) export >>> OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic.bi >>> n> >>> 3) Change to u-boot-dir >>> 4) make sifive_fu540_defconfig >>> 5) make all >>> 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk >>> to switch) >>> >>> # sudo sgdisk --clear \ >>> > --set-alignment=2 \ >>> > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ >>> > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >>> > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ >>> > /dev/sda >>> >>> 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >>> 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >>> >>> Changes in v11: >>> - Remove TPL related code and OF_PLATDATA from FU540 >>> DDR driver (drivers/ram/sifive/fu540_ddr.c) >>> - Update FU540 doc (doc/board/sifive/fu540.rst) >>> Remove unnecessary print >> >> Could we get this v11 applied as soon as possible for v2020.07? > > No problem, if everything is OK, I will applied ASAP. > But Jagan seem have some responses, please check about it. > >> >>> This series depends on: >>> [1] https://patchwork.ozlabs.org/patch/1281853 >>> [2] https://patchwork.ozlabs.org/patch/1281852 >> >> Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? > > Yes, the reason is that the CI verification of v10 of this series > "riscv: Add Sipeed Maix support" still fail. > Please check the discussion of [v10,20/21] doc: riscv: Add > documentation for Sipeed Maix Bit > > https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-21-seanga2@gmail.com/ > > That is why I still not pull it yet. > > Thanks, > Rick I think I have fixed the bug. However, travis is currently failing during apt with E: Failed to fetch https://apt.llvm.org/bionic/dists/llvm-toolchain-bionic-10/main/binary-amd64/Packages.gz File has unexpected size (8765 != 8774). Mirror sync in progress? [IP: 151.101.186.49 443] Release file created at: Tue, 19 May 2020 21:55:10 +0000 I will probably submit v11 in the morning, once the llvm repo gets fixed. Hopefully this will be the last revision :) --Sean
Hi Sean, On Wed, May 20, 2020 at 2:06 PM Sean Anderson <seanga2@gmail.com> wrote: > > On 5/19/20 11:07 PM, Rick Chen wrote: > > Hi Bin > > > >> -----Original Message----- > >> From: Bin Meng [mailto:bmeng.cn@gmail.com] > >> Sent: Tuesday, May 19, 2020 4:44 PM > >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) > >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> > >> Hi Rick, > >> > >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: > >>> > >>> This series add support for SPL to FU540. U-Boot SPL can boot from > >>> L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and > >>> U-Boot proper from MMC devices. > >>> > >>> This series depends on: > >>> [1] https://patchwork.ozlabs.org/patch/1281853 > >>> [2] https://patchwork.ozlabs.org/patch/1281852 > >>> > >>> All these together is available for testing here [3] [3] > >>> https://github.com/pragnesh26992/u-boot/tree/spl > >>> > >>> How to test this patch: > >>> 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y > >>> 2) export > >>> OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic.bi > >>> n> > >>> 3) Change to u-boot-dir > >>> 4) make sifive_fu540_defconfig > >>> 5) make all > >>> 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk > >>> to switch) > >>> > >>> # sudo sgdisk --clear \ > >>> > --set-alignment=2 \ > >>> > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ > >>> > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > >>> > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > >>> > /dev/sda > >>> > >>> 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > >>> 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 > >>> > >>> Changes in v11: > >>> - Remove TPL related code and OF_PLATDATA from FU540 > >>> DDR driver (drivers/ram/sifive/fu540_ddr.c) > >>> - Update FU540 doc (doc/board/sifive/fu540.rst) > >>> Remove unnecessary print > >> > >> Could we get this v11 applied as soon as possible for v2020.07? > > > > No problem, if everything is OK, I will applied ASAP. > > But Jagan seem have some responses, please check about it. > > > >> > >>> This series depends on: > >>> [1] https://patchwork.ozlabs.org/patch/1281853 > >>> [2] https://patchwork.ozlabs.org/patch/1281852 > >> > >> Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? > > > > Yes, the reason is that the CI verification of v10 of this series > > "riscv: Add Sipeed Maix support" still fail. > > Please check the discussion of [v10,20/21] doc: riscv: Add > > documentation for Sipeed Maix Bit > > > > https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-21-seanga2@gmail.com/ > > > > That is why I still not pull it yet. > > > > Thanks, > > Rick > > I think I have fixed the bug. However, travis is currently failing > during apt with > > E: Failed to fetch https://apt.llvm.org/bionic/dists/llvm-toolchain-bionic-10/main/binary-amd64/Packages.gz File has unexpected size (8765 != 8774). Mirror sync in progress? [IP: 151.101.186.49 443] > Release file created at: Tue, 19 May 2020 21:55:10 +0000 Travis is not stable. Could you please try Azure? > > I will probably submit v11 in the morning, once the llvm repo gets > fixed. Hopefully this will be the last revision :) Regards, Bin
On 5/20/20 2:32 AM, Bin Meng wrote: > Hi Sean, > > On Wed, May 20, 2020 at 2:06 PM Sean Anderson <seanga2@gmail.com> wrote: >> >> On 5/19/20 11:07 PM, Rick Chen wrote: >>> Hi Bin >>> >>>> -----Original Message----- >>>> From: Bin Meng [mailto:bmeng.cn@gmail.com] >>>> Sent: Tuesday, May 19, 2020 4:44 PM >>>> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) >>>> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >>>> >>>> Hi Rick, >>>> >>>> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: >>>>> >>>>> This series add support for SPL to FU540. U-Boot SPL can boot from >>>>> L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and >>>>> U-Boot proper from MMC devices. >>>>> >>>>> This series depends on: >>>>> [1] https://patchwork.ozlabs.org/patch/1281853 >>>>> [2] https://patchwork.ozlabs.org/patch/1281852 >>>>> >>>>> All these together is available for testing here [3] [3] >>>>> https://github.com/pragnesh26992/u-boot/tree/spl >>>>> >>>>> How to test this patch: >>>>> 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y >>>>> 2) export >>>>> OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic.bi >>>>> n> >>>>> 3) Change to u-boot-dir >>>>> 4) make sifive_fu540_defconfig >>>>> 5) make all >>>>> 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk >>>>> to switch) >>>>> >>>>> # sudo sgdisk --clear \ >>>>> > --set-alignment=2 \ >>>>> > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ >>>>> > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >>>>> > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ >>>>> > /dev/sda >>>>> >>>>> 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >>>>> 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >>>>> >>>>> Changes in v11: >>>>> - Remove TPL related code and OF_PLATDATA from FU540 >>>>> DDR driver (drivers/ram/sifive/fu540_ddr.c) >>>>> - Update FU540 doc (doc/board/sifive/fu540.rst) >>>>> Remove unnecessary print >>>> >>>> Could we get this v11 applied as soon as possible for v2020.07? >>> >>> No problem, if everything is OK, I will applied ASAP. >>> But Jagan seem have some responses, please check about it. >>> >>>> >>>>> This series depends on: >>>>> [1] https://patchwork.ozlabs.org/patch/1281853 >>>>> [2] https://patchwork.ozlabs.org/patch/1281852 >>>> >>>> Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? >>> >>> Yes, the reason is that the CI verification of v10 of this series >>> "riscv: Add Sipeed Maix support" still fail. >>> Please check the discussion of [v10,20/21] doc: riscv: Add >>> documentation for Sipeed Maix Bit >>> >>> https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-21-seanga2@gmail.com/ >>> >>> That is why I still not pull it yet. >>> >>> Thanks, >>> Rick >> >> I think I have fixed the bug. However, travis is currently failing >> during apt with >> >> E: Failed to fetch https://apt.llvm.org/bionic/dists/llvm-toolchain-bionic-10/main/binary-amd64/Packages.gz File has unexpected size (8765 != 8774). Mirror sync in progress? [IP: 151.101.186.49 443] >> Release file created at: Tue, 19 May 2020 21:55:10 +0000 > > Travis is not stable. Could you please try Azure? I've never used azure for CI before. Is there a guide to using it with u-boot anywhere? Perhaps this [1]? Will I need to pay for server time? [1] https://docs.microsoft.com/en-us/azure/devops/pipelines/repos/github In any case, it appears that the repo has gotten fixed. The build [2] passes for SPL targets (which were the only failures last time). [2] https://travis-ci.org/github/Forty-Bot/u-boot/builds/689112153 --Sean
Hi Sean, On Wed, May 20, 2020 at 2:38 PM Sean Anderson <seanga2@gmail.com> wrote: > > On 5/20/20 2:32 AM, Bin Meng wrote: > > Hi Sean, > > > > On Wed, May 20, 2020 at 2:06 PM Sean Anderson <seanga2@gmail.com> wrote: > >> > >> On 5/19/20 11:07 PM, Rick Chen wrote: > >>> Hi Bin > >>> > >>>> -----Original Message----- > >>>> From: Bin Meng [mailto:bmeng.cn@gmail.com] > >>>> Sent: Tuesday, May 19, 2020 4:44 PM > >>>> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) > >>>> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >>>> > >>>> Hi Rick, > >>>> > >>>> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: > >>>>> > >>>>> This series add support for SPL to FU540. U-Boot SPL can boot from > >>>>> L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and > >>>>> U-Boot proper from MMC devices. > >>>>> > >>>>> This series depends on: > >>>>> [1] https://patchwork.ozlabs.org/patch/1281853 > >>>>> [2] https://patchwork.ozlabs.org/patch/1281852 > >>>>> > >>>>> All these together is available for testing here [3] [3] > >>>>> https://github.com/pragnesh26992/u-boot/tree/spl > >>>>> > >>>>> How to test this patch: > >>>>> 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y > >>>>> 2) export > >>>>> OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic.bi > >>>>> n> > >>>>> 3) Change to u-boot-dir > >>>>> 4) make sifive_fu540_defconfig > >>>>> 5) make all > >>>>> 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk > >>>>> to switch) > >>>>> > >>>>> # sudo sgdisk --clear \ > >>>>> > --set-alignment=2 \ > >>>>> > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ > >>>>> > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > >>>>> > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > >>>>> > /dev/sda > >>>>> > >>>>> 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > >>>>> 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 > >>>>> > >>>>> Changes in v11: > >>>>> - Remove TPL related code and OF_PLATDATA from FU540 > >>>>> DDR driver (drivers/ram/sifive/fu540_ddr.c) > >>>>> - Update FU540 doc (doc/board/sifive/fu540.rst) > >>>>> Remove unnecessary print > >>>> > >>>> Could we get this v11 applied as soon as possible for v2020.07? > >>> > >>> No problem, if everything is OK, I will applied ASAP. > >>> But Jagan seem have some responses, please check about it. > >>> > >>>> > >>>>> This series depends on: > >>>>> [1] https://patchwork.ozlabs.org/patch/1281853 > >>>>> [2] https://patchwork.ozlabs.org/patch/1281852 > >>>> > >>>> Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? > >>> > >>> Yes, the reason is that the CI verification of v10 of this series > >>> "riscv: Add Sipeed Maix support" still fail. > >>> Please check the discussion of [v10,20/21] doc: riscv: Add > >>> documentation for Sipeed Maix Bit > >>> > >>> https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-21-seanga2@gmail.com/ > >>> > >>> That is why I still not pull it yet. > >>> > >>> Thanks, > >>> Rick > >> > >> I think I have fixed the bug. However, travis is currently failing > >> during apt with > >> > >> E: Failed to fetch https://apt.llvm.org/bionic/dists/llvm-toolchain-bionic-10/main/binary-amd64/Packages.gz File has unexpected size (8765 != 8774). Mirror sync in progress? [IP: 151.101.186.49 443] > >> Release file created at: Tue, 19 May 2020 21:55:10 +0000 > > > > Travis is not stable. Could you please try Azure? > > I've never used azure for CI before. Is there a guide to using it with > u-boot anywhere? Perhaps this [1]? Will I need to pay for server time? No, it's free for open source projects. You can search for "Azure pipelines" in the GitHub market place, and follow the instructions step by step. > > [1] https://docs.microsoft.com/en-us/azure/devops/pipelines/repos/github > > In any case, it appears that the repo has gotten fixed. The build [2] > passes for SPL targets (which were the only failures last time). > > [2] https://travis-ci.org/github/Forty-Bot/u-boot/builds/689112153 > Regards, Bin
>-----Original Message----- >From: Rick Chen <rickchen36@gmail.com> >Sent: 20 May 2020 08:38 >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel ><pragnesh.patel@sifive.com>; Jagan Teki <jagan@amarulasolutions.com>; >Sean Anderson <seanga2@gmail.com> >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; >Alan Kao <alankao@andestech.com> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >Hi Bin > >> -----Original Message----- >> From: Bin Meng [mailto:bmeng.cn@gmail.com] >> Sent: Tuesday, May 19, 2020 4:44 PM >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> Hi Rick, >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel ><pragnesh.patel@sifive.com> wrote: >> > >> > This series add support for SPL to FU540. U-Boot SPL can boot from >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and >> > U-Boot proper from MMC devices. >> > >> > This series depends on: >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> > >> > All these together is available for testing here [3] [3] >> > https://github.com/pragnesh26992/u-boot/tree/spl >> > >> > How to test this patch: >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y >> > 2) export >> > >OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic. >> > bi >> > n> >> > 3) Change to u-boot-dir >> > 4) make sifive_fu540_defconfig >> > 5) make all >> > 6) Format the SD card (make sure the disk has GPT, otherwise use >> > gdisk to switch) >> > >> > # sudo sgdisk --clear \ >> > > --set-alignment=2 \ >> > > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300- >FC78-40CD-8002-E86C45580B47 \ >> > > --new=2:2082:10273 --change-name=2:loader2 -- >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >> > > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF- >8483-4772-8E79-3D69D8477DE4 \ >> > > /dev/sda >> > >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >> > >> > Changes in v11: >> > - Remove TPL related code and OF_PLATDATA from FU540 >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) >> > - Update FU540 doc (doc/board/sifive/fu540.rst) >> > Remove unnecessary print >> >> Could we get this v11 applied as soon as possible for v2020.07? > >No problem, if everything is OK, I will applied ASAP. >But Jagan seem have some responses, please check about it. > >> >> > This series depends on: >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> > [2] https://patchwork.ozlabs.org/patch/1281852 With " assigned-clocks" and " assigned-clock-rates" for cpus, this FU540 SPL series is no more depend on the above patches. cpus { assigned-clocks = <&prci PRCI_CLK_COREPLL>; assigned-clock-rates = <1000000000>; ..... } I will update the series dependency in v12. Thanks to @Sean Anderson for the suggestion. >> >> Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? > >Yes, the reason is that the CI verification of v10 of this series >"riscv: Add Sipeed Maix support" still fail. >Please check the discussion of [v10,20/21] doc: riscv: Add documentation for >Sipeed Maix Bit > >https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733- >21-seanga2@gmail.com/ > >That is why I still not pull it yet. > >Thanks, >Rick > >> >> Regards, >> Bin
"Hi Pragnesh, On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: > > > > >-----Original Message----- > >From: Rick Chen <rickchen36@gmail.com> > >Sent: 20 May 2020 08:38 > >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel > ><pragnesh.patel@sifive.com>; Jagan Teki <jagan@amarulasolutions.com>; > >Sean Anderson <seanga2@gmail.com> > >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; > >Alan Kao <alankao@andestech.com> > >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >Hi Bin > > > >> -----Original Message----- > >> From: Bin Meng [mailto:bmeng.cn@gmail.com] > >> Sent: Tuesday, May 19, 2020 4:44 PM > >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) > >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> > >> Hi Rick, > >> > >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel > ><pragnesh.patel@sifive.com> wrote: > >> > > >> > This series add support for SPL to FU540. U-Boot SPL can boot from > >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and > >> > U-Boot proper from MMC devices. > >> > > >> > This series depends on: > >> > [1] https://patchwork.ozlabs.org/patch/1281853 > >> > [2] https://patchwork.ozlabs.org/patch/1281852 > >> > > >> > All these together is available for testing here [3] [3] > >> > https://github.com/pragnesh26992/u-boot/tree/spl > >> > > >> > How to test this patch: > >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y > >> > 2) export > >> > > >OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic. > >> > bi > >> > n> > >> > 3) Change to u-boot-dir > >> > 4) make sifive_fu540_defconfig > >> > 5) make all > >> > 6) Format the SD card (make sure the disk has GPT, otherwise use > >> > gdisk to switch) > >> > > >> > # sudo sgdisk --clear \ > >> > > --set-alignment=2 \ > >> > > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300- > >FC78-40CD-8002-E86C45580B47 \ > >> > > --new=2:2082:10273 --change-name=2:loader2 -- > >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > >> > > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF- > >8483-4772-8E79-3D69D8477DE4 \ > >> > > /dev/sda > >> > > >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 > >> > > >> > Changes in v11: > >> > - Remove TPL related code and OF_PLATDATA from FU540 > >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) > >> > - Update FU540 doc (doc/board/sifive/fu540.rst) > >> > Remove unnecessary print > >> > >> Could we get this v11 applied as soon as possible for v2020.07? > > > >No problem, if everything is OK, I will applied ASAP. > >But Jagan seem have some responses, please check about it. > > > >> > >> > This series depends on: > >> > [1] https://patchwork.ozlabs.org/patch/1281853 > >> > [2] https://patchwork.ozlabs.org/patch/1281852 > > With " assigned-clocks" and " assigned-clock-rates" for cpus, this FU540 SPL series is no more depend on > the above patches. > > cpus { > assigned-clocks = <&prci PRCI_CLK_COREPLL>; > assigned-clock-rates = <1000000000>; > ..... > } > > I will update the series dependency in v12. Thanks to @Sean Anderson for the suggestion. > Are these "assigned-clocks" and "assigned-clock-rates" bindings the suggested ones by the Linux kernel upstream? Regards, Bin
Hi Bin, >-----Original Message----- >From: Bin Meng <bmeng.cn@gmail.com> >Sent: 20 May 2020 13:07 >To: Pragnesh Patel <pragnesh.patel@sifive.com> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; U- >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; Alan >Kao <alankao@andestech.com> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >"Hi Pragnesh, > >On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel ><pragnesh.patel@sifive.com> wrote: >> >> >> >> >-----Original Message----- >> >From: Rick Chen <rickchen36@gmail.com> >> >Sent: 20 May 2020 08:38 >> >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel >> ><pragnesh.patel@sifive.com>; Jagan Teki <jagan@amarulasolutions.com>; >> >Sean Anderson <seanga2@gmail.com> >> >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick >> ><rick@andestech.com>; Alan Kao <alankao@andestech.com> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> > >> >[External Email] Do not click links or attachments unless you >> >recognize the sender and know the content is safe >> > >> >Hi Bin >> > >> >> -----Original Message----- >> >> From: Bin Meng [mailto:bmeng.cn@gmail.com] >> >> Sent: Tuesday, May 19, 2020 4:44 PM >> >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) >> >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> >> >> Hi Rick, >> >> >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel >> ><pragnesh.patel@sifive.com> wrote: >> >> > >> >> > This series add support for SPL to FU540. U-Boot SPL can boot >> >> > from >> >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) >and >> >> > U-Boot proper from MMC devices. >> >> > >> >> > This series depends on: >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> >> > >> >> > All these together is available for testing here [3] [3] >> >> > https://github.com/pragnesh26992/u-boot/tree/spl >> >> > >> >> > How to test this patch: >> >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y >> >> > 2) export >> >> > >> >>OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic. >> >> > bi >> >> > n> >> >> > 3) Change to u-boot-dir >> >> > 4) make sifive_fu540_defconfig >> >> > 5) make all >> >> > 6) Format the SD card (make sure the disk has GPT, otherwise use >> >> > gdisk to switch) >> >> > >> >> > # sudo sgdisk --clear \ >> >> > > --set-alignment=2 \ >> >> > > --new=1:34:2081 --change-name=1:loader1 >> >> > --typecode=1:5B193300- >> >FC78-40CD-8002-E86C45580B47 \ >> >> > > --new=2:2082:10273 --change-name=2:loader2 -- >> >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >> >> > > --new=3:10274: --change-name=3:rootfs >> >> > --typecode=3:0FC63DAF- >> >8483-4772-8E79-3D69D8477DE4 \ >> >> > > /dev/sda >> >> > >> >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >> >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >> >> > >> >> > Changes in v11: >> >> > - Remove TPL related code and OF_PLATDATA from FU540 >> >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) >> >> > - Update FU540 doc (doc/board/sifive/fu540.rst) >> >> > Remove unnecessary print >> >> >> >> Could we get this v11 applied as soon as possible for v2020.07? >> > >> >No problem, if everything is OK, I will applied ASAP. >> >But Jagan seem have some responses, please check about it. >> > >> >> >> >> > This series depends on: >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> >> With " assigned-clocks" and " assigned-clock-rates" for cpus, this >> FU540 SPL series is no more depend on the above patches. >> >> cpus { >> assigned-clocks = <&prci PRCI_CLK_COREPLL>; >> assigned-clock-rates = <1000000000>; ..... >> } >> >> I will update the series dependency in v12. Thanks to @Sean Anderson for >the suggestion. >> > >Are these "assigned-clocks" and "assigned-clock-rates" bindings the >suggested ones by the Linux kernel upstream? https://patchwork.ozlabs.org/project/uboot/patch/20200502100628.24809-17-pragnesh.patel@sifive.com/ > >Regards, >Bin
Hi Pragnesh, On Wed, May 20, 2020 at 3:41 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: > > Hi Bin, > > >-----Original Message----- > >From: Bin Meng <bmeng.cn@gmail.com> > >Sent: 20 May 2020 13:07 > >To: Pragnesh Patel <pragnesh.patel@sifive.com> > >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki > ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; U- > >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; Alan > >Kao <alankao@andestech.com> > >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >"Hi Pragnesh, > > > >On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel > ><pragnesh.patel@sifive.com> wrote: > >> > >> > >> > >> >-----Original Message----- > >> >From: Rick Chen <rickchen36@gmail.com> > >> >Sent: 20 May 2020 08:38 > >> >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel > >> ><pragnesh.patel@sifive.com>; Jagan Teki <jagan@amarulasolutions.com>; > >> >Sean Anderson <seanga2@gmail.com> > >> >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick > >> ><rick@andestech.com>; Alan Kao <alankao@andestech.com> > >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> > > >> >[External Email] Do not click links or attachments unless you > >> >recognize the sender and know the content is safe > >> > > >> >Hi Bin > >> > > >> >> -----Original Message----- > >> >> From: Bin Meng [mailto:bmeng.cn@gmail.com] > >> >> Sent: Tuesday, May 19, 2020 4:44 PM > >> >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) > >> >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> >> > >> >> Hi Rick, > >> >> > >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel > >> ><pragnesh.patel@sifive.com> wrote: > >> >> > > >> >> > This series add support for SPL to FU540. U-Boot SPL can boot > >> >> > from > >> >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) > >and > >> >> > U-Boot proper from MMC devices. > >> >> > > >> >> > This series depends on: > >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 > >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 > >> >> > > >> >> > All these together is available for testing here [3] [3] > >> >> > https://github.com/pragnesh26992/u-boot/tree/spl > >> >> > > >> >> > How to test this patch: > >> >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y > >> >> > 2) export > >> >> > > >> > >>OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic. > >> >> > bi > >> >> > n> > >> >> > 3) Change to u-boot-dir > >> >> > 4) make sifive_fu540_defconfig > >> >> > 5) make all > >> >> > 6) Format the SD card (make sure the disk has GPT, otherwise use > >> >> > gdisk to switch) > >> >> > > >> >> > # sudo sgdisk --clear \ > >> >> > > --set-alignment=2 \ > >> >> > > --new=1:34:2081 --change-name=1:loader1 > >> >> > --typecode=1:5B193300- > >> >FC78-40CD-8002-E86C45580B47 \ > >> >> > > --new=2:2082:10273 --change-name=2:loader2 -- > >> >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > >> >> > > --new=3:10274: --change-name=3:rootfs > >> >> > --typecode=3:0FC63DAF- > >> >8483-4772-8E79-3D69D8477DE4 \ > >> >> > > /dev/sda > >> >> > > >> >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > >> >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 > >> >> > > >> >> > Changes in v11: > >> >> > - Remove TPL related code and OF_PLATDATA from FU540 > >> >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) > >> >> > - Update FU540 doc (doc/board/sifive/fu540.rst) > >> >> > Remove unnecessary print > >> >> > >> >> Could we get this v11 applied as soon as possible for v2020.07? > >> > > >> >No problem, if everything is OK, I will applied ASAP. > >> >But Jagan seem have some responses, please check about it. > >> > > >> >> > >> >> > This series depends on: > >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 > >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 > >> > >> With " assigned-clocks" and " assigned-clock-rates" for cpus, this > >> FU540 SPL series is no more depend on the above patches. > >> > >> cpus { > >> assigned-clocks = <&prci PRCI_CLK_COREPLL>; > >> assigned-clock-rates = <1000000000>; ..... > >> } > >> > >> I will update the series dependency in v12. Thanks to @Sean Anderson for > >the suggestion. > >> > > > >Are these "assigned-clocks" and "assigned-clock-rates" bindings the > >suggested ones by the Linux kernel upstream? > > https://patchwork.ozlabs.org/project/uboot/patch/20200502100628.24809-17-pragnesh.patel@sifive.com/ I see. "assigned-clocks" is only needed for U-Boot. Do we still need "clocks" in each cpu node? Regards, Bin
Hi Bin, >-----Original Message----- >From: Bin Meng <bmeng.cn@gmail.com> >Sent: 20 May 2020 15:54 >To: Pragnesh Patel <pragnesh.patel@sifive.com> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; U- >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; Alan >Kao <alankao@andestech.com> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >Hi Pragnesh, > >On Wed, May 20, 2020 at 3:41 PM Pragnesh Patel ><pragnesh.patel@sifive.com> wrote: >> >> Hi Bin, >> >> >-----Original Message----- >> >From: Bin Meng <bmeng.cn@gmail.com> >> >Sent: 20 May 2020 13:07 >> >To: Pragnesh Patel <pragnesh.patel@sifive.com> >> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki >> ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; >U- >> >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; >> >Alan Kao <alankao@andestech.com> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> > >> >[External Email] Do not click links or attachments unless you >> >recognize the sender and know the content is safe >> > >> >"Hi Pragnesh, >> > >> >On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel >> ><pragnesh.patel@sifive.com> wrote: >> >> >> >> >> >> >> >> >-----Original Message----- >> >> >From: Rick Chen <rickchen36@gmail.com> >> >> >Sent: 20 May 2020 08:38 >> >> >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel >> >> ><pragnesh.patel@sifive.com>; Jagan Teki >> >> ><jagan@amarulasolutions.com>; Sean Anderson ><seanga2@gmail.com> >> >> >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick >> >> ><rick@andestech.com>; Alan Kao <alankao@andestech.com> >> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> > >> >> >[External Email] Do not click links or attachments unless you >> >> >recognize the sender and know the content is safe >> >> > >> >> >Hi Bin >> >> > >> >> >> -----Original Message----- >> >> >> From: Bin Meng [mailto:bmeng.cn@gmail.com] >> >> >> Sent: Tuesday, May 19, 2020 4:44 PM >> >> >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) >> >> >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> >> >> >> >> Hi Rick, >> >> >> >> >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel >> >> ><pragnesh.patel@sifive.com> wrote: >> >> >> > >> >> >> > This series add support for SPL to FU540. U-Boot SPL can boot >> >> >> > from >> >> >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC >firmware) >> >and >> >> >> > U-Boot proper from MMC devices. >> >> >> > >> >> >> > This series depends on: >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> >> >> > >> >> >> > All these together is available for testing here [3] [3] >> >> >> > https://github.com/pragnesh26992/u-boot/tree/spl >> >> >> > >> >> >> > How to test this patch: >> >> >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y >> >> >> > 2) export >> >> >> > >> >> >> >>>OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynami >c. >> >> >> > bi >> >> >> > n> >> >> >> > 3) Change to u-boot-dir >> >> >> > 4) make sifive_fu540_defconfig >> >> >> > 5) make all >> >> >> > 6) Format the SD card (make sure the disk has GPT, otherwise >> >> >> > use gdisk to switch) >> >> >> > >> >> >> > # sudo sgdisk --clear \ >> >> >> > > --set-alignment=2 \ >> >> >> > > --new=1:34:2081 --change-name=1:loader1 >> >> >> > --typecode=1:5B193300- >> >> >FC78-40CD-8002-E86C45580B47 \ >> >> >> > > --new=2:2082:10273 --change-name=2:loader2 -- >> >> >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >> >> >> > > --new=3:10274: --change-name=3:rootfs >> >> >> > --typecode=3:0FC63DAF- >> >> >8483-4772-8E79-3D69D8477DE4 \ >> >> >> > > /dev/sda >> >> >> > >> >> >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >> >> >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >> >> >> > >> >> >> > Changes in v11: >> >> >> > - Remove TPL related code and OF_PLATDATA from FU540 >> >> >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) >> >> >> > - Update FU540 doc (doc/board/sifive/fu540.rst) >> >> >> > Remove unnecessary print >> >> >> >> >> >> Could we get this v11 applied as soon as possible for v2020.07? >> >> > >> >> >No problem, if everything is OK, I will applied ASAP. >> >> >But Jagan seem have some responses, please check about it. >> >> > >> >> >> >> >> >> > This series depends on: >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> >> >> >> With " assigned-clocks" and " assigned-clock-rates" for cpus, this >> >> FU540 SPL series is no more depend on the above patches. >> >> >> >> cpus { >> >> assigned-clocks = <&prci PRCI_CLK_COREPLL>; >> >> assigned-clock-rates = <1000000000>; ..... >> >> } >> >> >> >> I will update the series dependency in v12. Thanks to @Sean >> >> Anderson for >> >the suggestion. >> >> >> > >> >Are these "assigned-clocks" and "assigned-clock-rates" bindings the >> >suggested ones by the Linux kernel upstream? >> >> https://patchwork.ozlabs.org/project/uboot/patch/20200502100628.24809- >> 17-pragnesh.patel@sifive.com/ > >I see. "assigned-clocks" is only needed for U-Boot. > >Do we still need "clocks" in each cpu node? Right now, "cpu detail" shows wrong frequency in U-Boot for FU540. This https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-18-seanga2@gmail.com/ patch solves that problem. For this patch, we need "clocks" in each cpu node. > >Regards, >Bin
Hi Pragnesh, On Wed, May 20, 2020 at 7:52 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote: > > Hi Bin, > > >-----Original Message----- > >From: Bin Meng <bmeng.cn@gmail.com> > >Sent: 20 May 2020 15:54 > >To: Pragnesh Patel <pragnesh.patel@sifive.com> > >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki > ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; U- > >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; Alan > >Kao <alankao@andestech.com> > >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >Hi Pragnesh, > > > >On Wed, May 20, 2020 at 3:41 PM Pragnesh Patel > ><pragnesh.patel@sifive.com> wrote: > >> > >> Hi Bin, > >> > >> >-----Original Message----- > >> >From: Bin Meng <bmeng.cn@gmail.com> > >> >Sent: 20 May 2020 13:07 > >> >To: Pragnesh Patel <pragnesh.patel@sifive.com> > >> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki > >> ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; > >U- > >> >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; > >> >Alan Kao <alankao@andestech.com> > >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> > > >> >[External Email] Do not click links or attachments unless you > >> >recognize the sender and know the content is safe > >> > > >> >"Hi Pragnesh, > >> > > >> >On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel > >> ><pragnesh.patel@sifive.com> wrote: > >> >> > >> >> > >> >> > >> >> >-----Original Message----- > >> >> >From: Rick Chen <rickchen36@gmail.com> > >> >> >Sent: 20 May 2020 08:38 > >> >> >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel > >> >> ><pragnesh.patel@sifive.com>; Jagan Teki > >> >> ><jagan@amarulasolutions.com>; Sean Anderson > ><seanga2@gmail.com> > >> >> >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick > >> >> ><rick@andestech.com>; Alan Kao <alankao@andestech.com> > >> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> >> > > >> >> >[External Email] Do not click links or attachments unless you > >> >> >recognize the sender and know the content is safe > >> >> > > >> >> >Hi Bin > >> >> > > >> >> >> -----Original Message----- > >> >> >> From: Bin Meng [mailto:bmeng.cn@gmail.com] > >> >> >> Sent: Tuesday, May 19, 2020 4:44 PM > >> >> >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) > >> >> >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >> >> >> > >> >> >> Hi Rick, > >> >> >> > >> >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel > >> >> ><pragnesh.patel@sifive.com> wrote: > >> >> >> > > >> >> >> > This series add support for SPL to FU540. U-Boot SPL can boot > >> >> >> > from > >> >> >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC > >firmware) > >> >and > >> >> >> > U-Boot proper from MMC devices. > >> >> >> > > >> >> >> > This series depends on: > >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 > >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 > >> >> >> > > >> >> >> > All these together is available for testing here [3] [3] > >> >> >> > https://github.com/pragnesh26992/u-boot/tree/spl > >> >> >> > > >> >> >> > How to test this patch: > >> >> >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y > >> >> >> > 2) export > >> >> >> > > >> >> > >> > >>>OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynami > >c. > >> >> >> > bi > >> >> >> > n> > >> >> >> > 3) Change to u-boot-dir > >> >> >> > 4) make sifive_fu540_defconfig > >> >> >> > 5) make all > >> >> >> > 6) Format the SD card (make sure the disk has GPT, otherwise > >> >> >> > use gdisk to switch) > >> >> >> > > >> >> >> > # sudo sgdisk --clear \ > >> >> >> > > --set-alignment=2 \ > >> >> >> > > --new=1:34:2081 --change-name=1:loader1 > >> >> >> > --typecode=1:5B193300- > >> >> >FC78-40CD-8002-E86C45580B47 \ > >> >> >> > > --new=2:2082:10273 --change-name=2:loader2 -- > >> >> >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > >> >> >> > > --new=3:10274: --change-name=3:rootfs > >> >> >> > --typecode=3:0FC63DAF- > >> >> >8483-4772-8E79-3D69D8477DE4 \ > >> >> >> > > /dev/sda > >> >> >> > > >> >> >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > >> >> >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 > >> >> >> > > >> >> >> > Changes in v11: > >> >> >> > - Remove TPL related code and OF_PLATDATA from FU540 > >> >> >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) > >> >> >> > - Update FU540 doc (doc/board/sifive/fu540.rst) > >> >> >> > Remove unnecessary print > >> >> >> > >> >> >> Could we get this v11 applied as soon as possible for v2020.07? > >> >> > > >> >> >No problem, if everything is OK, I will applied ASAP. > >> >> >But Jagan seem have some responses, please check about it. > >> >> > > >> >> >> > >> >> >> > This series depends on: > >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 > >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 > >> >> > >> >> With " assigned-clocks" and " assigned-clock-rates" for cpus, this > >> >> FU540 SPL series is no more depend on the above patches. > >> >> > >> >> cpus { > >> >> assigned-clocks = <&prci PRCI_CLK_COREPLL>; > >> >> assigned-clock-rates = <1000000000>; ..... > >> >> } > >> >> > >> >> I will update the series dependency in v12. Thanks to @Sean > >> >> Anderson for > >> >the suggestion. > >> >> > >> > > >> >Are these "assigned-clocks" and "assigned-clock-rates" bindings the > >> >suggested ones by the Linux kernel upstream? > >> > >> https://patchwork.ozlabs.org/project/uboot/patch/20200502100628.24809- > >> 17-pragnesh.patel@sifive.com/ > > > >I see. "assigned-clocks" is only needed for U-Boot. > > > >Do we still need "clocks" in each cpu node? > > Right now, "cpu detail" shows wrong frequency in U-Boot for FU540. > This https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-18-seanga2@gmail.com/ patch solves that problem. > > For this patch, we need "clocks" in each cpu node. Thanks. So for SPL booting this series does not depend on Sean's patches, but for "cpu detail" to show correct frequency, Sean's patches are still needed. Regards, Bin
Hi Bin, >-----Original Message----- >From: Bin Meng <bmeng.cn@gmail.com> >Sent: 20 May 2020 19:15 >To: Pragnesh Patel <pragnesh.patel@sifive.com> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; U- >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; Alan >Kao <alankao@andestech.com> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >Hi Pragnesh, > >On Wed, May 20, 2020 at 7:52 PM Pragnesh Patel ><pragnesh.patel@sifive.com> wrote: >> >> Hi Bin, >> >> >-----Original Message----- >> >From: Bin Meng <bmeng.cn@gmail.com> >> >Sent: 20 May 2020 15:54 >> >To: Pragnesh Patel <pragnesh.patel@sifive.com> >> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki >> ><jagan@amarulasolutions.com>; Sean Anderson <seanga2@gmail.com>; >U- >> >Boot Mailing List <u-boot@lists.denx.de>; rick <rick@andestech.com>; >> >Alan Kao <alankao@andestech.com> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> > >> >[External Email] Do not click links or attachments unless you >> >recognize the sender and know the content is safe >> > >> >Hi Pragnesh, >> > >> >On Wed, May 20, 2020 at 3:41 PM Pragnesh Patel >> ><pragnesh.patel@sifive.com> wrote: >> >> >> >> Hi Bin, >> >> >> >> >-----Original Message----- >> >> >From: Bin Meng <bmeng.cn@gmail.com> >> >> >Sent: 20 May 2020 13:07 >> >> >To: Pragnesh Patel <pragnesh.patel@sifive.com> >> >> >Cc: Rick Chen <rickchen36@gmail.com>; Jagan Teki >> >> ><jagan@amarulasolutions.com>; Sean Anderson ><seanga2@gmail.com>; >> >U- >> >> >Boot Mailing List <u-boot@lists.denx.de>; rick >> >> ><rick@andestech.com>; Alan Kao <alankao@andestech.com> >> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> > >> >> >[External Email] Do not click links or attachments unless you >> >> >recognize the sender and know the content is safe >> >> > >> >> >"Hi Pragnesh, >> >> > >> >> >On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel >> >> ><pragnesh.patel@sifive.com> wrote: >> >> >> >> >> >> >> >> >> >> >> >> >-----Original Message----- >> >> >> >From: Rick Chen <rickchen36@gmail.com> >> >> >> >Sent: 20 May 2020 08:38 >> >> >> >To: Bin Meng <bmeng.cn@gmail.com>; Pragnesh Patel >> >> >> ><pragnesh.patel@sifive.com>; Jagan Teki >> >> >> ><jagan@amarulasolutions.com>; Sean Anderson >> ><seanga2@gmail.com> >> >> >> >Cc: U-Boot Mailing List <u-boot@lists.denx.de>; rick >> >> >> ><rick@andestech.com>; Alan Kao <alankao@andestech.com> >> >> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> >> > >> >> >> >[External Email] Do not click links or attachments unless you >> >> >> >recognize the sender and know the content is safe >> >> >> > >> >> >> >Hi Bin >> >> >> > >> >> >> >> -----Original Message----- >> >> >> >> From: Bin Meng [mailto:bmeng.cn@gmail.com] >> >> >> >> Sent: Tuesday, May 19, 2020 4:44 PM >> >> >> >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志) >> >> >> >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support >> >> >> >> SPL >> >> >> >> >> >> >> >> Hi Rick, >> >> >> >> >> >> >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel >> >> >> ><pragnesh.patel@sifive.com> wrote: >> >> >> >> > >> >> >> >> > This series add support for SPL to FU540. U-Boot SPL can >> >> >> >> > boot from >> >> >> >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC >> >firmware) >> >> >and >> >> >> >> > U-Boot proper from MMC devices. >> >> >> >> > >> >> >> >> > This series depends on: >> >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> >> >> >> > >> >> >> >> > All these together is available for testing here [3] [3] >> >> >> >> > https://github.com/pragnesh26992/u-boot/tree/spl >> >> >> >> > >> >> >> >> > How to test this patch: >> >> >> >> > 1) Go to OpenSBI-dir : make PLATFORM=generic >FW_DYNAMIC=y >> >> >> >> > 2) export >> >> >> >> > >> >> >> >> >> >> >>>>OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynam >i >> >c. >> >> >> >> > bi >> >> >> >> > n> >> >> >> >> > 3) Change to u-boot-dir >> >> >> >> > 4) make sifive_fu540_defconfig >> >> >> >> > 5) make all >> >> >> >> > 6) Format the SD card (make sure the disk has GPT, >> >> >> >> > otherwise use gdisk to switch) >> >> >> >> > >> >> >> >> > # sudo sgdisk --clear \ >> >> >> >> > > --set-alignment=2 \ >> >> >> >> > > --new=1:34:2081 --change-name=1:loader1 >> >> >> >> > --typecode=1:5B193300- >> >> >> >FC78-40CD-8002-E86C45580B47 \ >> >> >> >> > > --new=2:2082:10273 --change-name=2:loader2 -- >> >> >> >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >> >> >> >> > > --new=3:10274: --change-name=3:rootfs >> >> >> >> > --typecode=3:0FC63DAF- >> >> >> >8483-4772-8E79-3D69D8477DE4 \ >> >> >> >> > > /dev/sda >> >> >> >> > >> >> >> >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >> >> >> >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >> >> >> >> > >> >> >> >> > Changes in v11: >> >> >> >> > - Remove TPL related code and OF_PLATDATA from FU540 >> >> >> >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) >> >> >> >> > - Update FU540 doc (doc/board/sifive/fu540.rst) >> >> >> >> > Remove unnecessary print >> >> >> >> >> >> >> >> Could we get this v11 applied as soon as possible for v2020.07? >> >> >> > >> >> >> >No problem, if everything is OK, I will applied ASAP. >> >> >> >But Jagan seem have some responses, please check about it. >> >> >> > >> >> >> >> >> >> >> >> > This series depends on: >> >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> >> >> >> >> >> With " assigned-clocks" and " assigned-clock-rates" for cpus, >> >> >> this >> >> >> FU540 SPL series is no more depend on the above patches. >> >> >> >> >> >> cpus { >> >> >> assigned-clocks = <&prci PRCI_CLK_COREPLL>; >> >> >> assigned-clock-rates = <1000000000>; ..... >> >> >> } >> >> >> >> >> >> I will update the series dependency in v12. Thanks to @Sean >> >> >> Anderson for >> >> >the suggestion. >> >> >> >> >> > >> >> >Are these "assigned-clocks" and "assigned-clock-rates" bindings >> >> >the suggested ones by the Linux kernel upstream? >> >> >> >> https://patchwork.ozlabs.org/project/uboot/patch/20200502100628.248 >> >> 09- >> >> 17-pragnesh.patel@sifive.com/ >> > >> >I see. "assigned-clocks" is only needed for U-Boot. >> > >> >Do we still need "clocks" in each cpu node? >> >> Right now, "cpu detail" shows wrong frequency in U-Boot for FU540. >> This >https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733- >18-seanga2@gmail.com/ patch solves that problem. >> >> For this patch, we need "clocks" in each cpu node. > >Thanks. So for SPL booting this series does not depend on Sean's patches, but >for "cpu detail" to show correct frequency, Sean's patches are still needed. Ahhh, yes. > >Regards, >Bin
This series add support for SPL to FU540. U-Boot SPL can boot from L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and U-Boot proper from MMC devices. This series depends on: [1] https://patchwork.ozlabs.org/patch/1281853 [2] https://patchwork.ozlabs.org/patch/1281852 All these together is available for testing here [3] [3] https://github.com/pragnesh26992/u-boot/tree/spl How to test this patch: 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y 2) export OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynamic.bin> 3) Change to u-boot-dir 4) make sifive_fu540_defconfig 5) make all 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch) # sudo sgdisk --clear \ > --set-alignment=2 \ > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > /dev/sda 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 Changes in v11: - Remove TPL related code and OF_PLATDATA from FU540 DDR driver (drivers/ram/sifive/fu540_ddr.c) - Update FU540 doc (doc/board/sifive/fu540.rst) Remove unnecessary print Changes in v10: - Update commit description for ethernet clock reset (https://patchwork.ozlabs.org/patch/1289003) - Update commit description for ddr clock initialization (https://patchwork.ozlabs.org/patch/1289000) Changes in v9: - Remove cache related patches from this series sifive: dts: fu540: Enable L2 Cache in U-Boot (https://patchwork.ozlabs.org/patch/1286705) riscv: sifive: fu540: enable all cache ways from U-Boot proper (https://patchwork.ozlabs.org/patch/1286706) - Rename SiFive DDR driver from sdram_fu540.c to fu540_ddr.c and also do some typo correction in driver - Remove CONFIG_SPL_BUILD for __prci_ddr_release_reset() - Release ethernet clock reset instead of ethernet clock initialization (https://patchwork.ozlabs.org/patch/1286697) - Squash fu540 cpu patches (https://patchwork.ozlabs.org/patch/1286699) (https://patchwork.ozlabs.org/patch/1286700) - Use spl_boot_device() instead of board_boot_order() Changes in v8: - Remove SPL_CRC7_SUPPORT Kconfig option and compile crc7.o when CONFIG_MMC_SPI selected - Add "TODO" in drivers/ram/sifive/sdram_fu540.c - Remove unnecessary TODO from drivers/clk/sifive/fu540-prci.c - Make fu540-hifive-unleashed-a00-sdram-ddr4.dtsi file dual-licensed - Add 2 new patches sifive: fu540: Add sample SD gpt partition layout (https://patchwork.ozlabs.org/patch/1092) sifive: fu540: Add U-Boot proper sector start (https://patchwork.ozlabs.org/patch/1093) - Remove patch riscv: Enable cpu clock if it is present (https://patchwork.ozlabs.org/patch/1281573) - Update doc/board/sifive/fu540.rst for PLATFORM=generic Changes in v7: - Standardize SD gpt partition layout - Add delay for SiFive OTP driver - Use DM way for corepll and ddrpll - Add new cpu fu540 (arch/riscv/cpu/fu540) - Update document for FU540 (doc/board/sifive/fu540.rst) Changes in v6: - Typo Correction - Make fu540-c000-u-boot.dtsi and hifive-unleashed-a00-u-boot.dtsi Dual Licensed - Sync Hifive unleashed dts from Linux - Add arch/riscv/fu540 for FU540 specific code Changes in v5: - Return read/write bytes for sifive_otp_read and sifive_otp_write - Correct Palmer's email address Changes in v4: - Split misc DM driver patch into multiple patches - Added new SPL_CRC7_SUPPORT Kconfig option - Added DM driver for DDR - Added clk_enable and clk_disable ops in SiFive PRCI driver - Added early clock initialization for SPL in SiFive PRCI driver - Added early clock initialization for SPL in SiFive PRCI driver - Added SPL config options in sifive_fu540_defconfig instead of creatiing a new config file for SPL - Update fu540.rst on how to build and flash U-boot SPL Changes in v3: - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ - Split SPL patches into DDR and SPL and spl defconfig - Update fu540/MAINTAINERS file - Update fu540.rst on how to build and flash U-boot SPL Changes in v2: - Add DM driver Sifive OTP - Split SPL patches into multiple patches - Add a seprate patch for _image_binary_end and crc7.c - Add a seprate patch to add board -u-boot.dtsi files - Update FU540 RISC-V documentation Jagan Teki (2): sifive: fu540: Add sample SD gpt partition layout sifive: fu540: Add U-Boot proper sector start Pragnesh Patel (16): misc: add driver for the SiFive otp controller riscv: sifive: fu540: Use OTP DM driver for serial environment variable riscv: Add _image_binary_end for SPL lib: Makefile: build crc7.c when CONFIG_MMC_SPI riscv: sifive: dts: fu540: Add board -u-boot.dtsi files sifive: fu540: add ddr driver sifive: dts: fu540: Add DDR controller and phy register settings riscv: sifive: dts: fu540: add U-Boot dmc node clk: sifive: fu540-prci: Add clock enable and disable ops clk: sifive: fu540-prci: Add ddr clock initialization clk: sifive: fu540-prci: Release ethernet clock reset riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux riscv: cpu: fu540: Add support for cpu fu540 riscv: sifive: fu540: add SPL configuration configs: fu540: Add config options for U-Boot SPL doc: sifive: fu540: Add description for OpenSBI generic platform arch/riscv/Kconfig | 1 + arch/riscv/cpu/fu540/Kconfig | 15 + arch/riscv/cpu/fu540/Makefile | 11 + arch/riscv/cpu/fu540/cpu.c | 22 + arch/riscv/cpu/fu540/dram.c | 38 + arch/riscv/cpu/fu540/spl.c | 23 + arch/riscv/cpu/u-boot-spl.lds | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 84 + arch/riscv/dts/fu540-c000.dtsi | 37 +- .../dts/fu540-hifive-unleashed-a00-ddr.dtsi | 1489 +++++++++++++++++ .../dts/hifive-unleashed-a00-u-boot.dtsi | 22 + arch/riscv/dts/hifive-unleashed-a00.dts | 9 + arch/riscv/include/asm/arch-fu540/clk.h | 14 + arch/riscv/include/asm/arch-fu540/gpio.h | 38 + arch/riscv/include/asm/arch-fu540/spl.h | 14 + board/sifive/fu540/Kconfig | 18 +- board/sifive/fu540/Makefile | 4 + board/sifive/fu540/fu540.c | 132 +- board/sifive/fu540/spl.c | 72 + common/spl/Kconfig | 3 +- configs/sifive_fu540_defconfig | 8 + doc/board/sifive/fu540.rst | 142 +- drivers/clk/sifive/fu540-prci.c | 177 +- drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/sifive-otp.c | 273 +++ drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 2 + drivers/ram/sifive/Kconfig | 13 + drivers/ram/sifive/Makefile | 6 + drivers/ram/sifive/fu540_ddr.c | 409 +++++ include/configs/sifive-fu540.h | 31 + lib/Makefile | 2 +- 33 files changed, 3014 insertions(+), 105 deletions(-) create mode 100644 arch/riscv/cpu/fu540/Kconfig create mode 100644 arch/riscv/cpu/fu540/Makefile create mode 100644 arch/riscv/cpu/fu540/cpu.c create mode 100644 arch/riscv/cpu/fu540/dram.c create mode 100644 arch/riscv/cpu/fu540/spl.c create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h create mode 100644 arch/riscv/include/asm/arch-fu540/spl.h create mode 100644 board/sifive/fu540/spl.c create mode 100644 drivers/misc/sifive-otp.c create mode 100644 drivers/ram/sifive/Kconfig create mode 100644 drivers/ram/sifive/Makefile create mode 100644 drivers/ram/sifive/fu540_ddr.c