diff mbox series

[PATCHv2,4/9] board: lx2160a: Make sure the RD tables address align to 64KB

Message ID 20200324081209.48449-5-Zhiqiang.Hou@nxp.com
State Changes Requested
Delegated to: Priyanka Jain
Headers show
Series fsl: layerscape: Initialize the GIC redistributor | expand

Commit Message

Z.Q. Hou March 24, 2020, 8:12 a.m. UTC
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

As the lower 16bit of the redistributor pending table is reserved
for describing the memory attributes, we must give a 64KB aligned
address to the GIC LPI initialization function.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - The #5 of v1 patchset.

 board/freescale/lx2160a/lx2160a.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Wasim Khan April 21, 2020, 7:38 a.m. UTC | #1
> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address align to
> 64KB
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> As the lower 16bit of the redistributor pending table is reserved for describing
> the memory attributes, we must give a 64KB aligned address to the GIC LPI
> initialization function.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>


Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

> ---
> V2:
>  - The #5 of v1 patchset.
> 
>  board/freescale/lx2160a/lx2160a.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/board/freescale/lx2160a/lx2160a.c
> b/board/freescale/lx2160a/lx2160a.c
> index 7f22110dc6..c8e962ce3d 100644
> --- a/board/freescale/lx2160a/lx2160a.c
> +++ b/board/freescale/lx2160a/lx2160a.c
> @@ -17,6 +17,7 @@
>  #include <asm/io.h>
>  #include <fdt_support.h>
>  #include <linux/libfdt.h>
> +#include <linux/sizes.h>
>  #include <fsl-mc/fsl_mc.h>
>  #include <env_internal.h>
>  #include <efi_loader.h>
> @@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
>  	}
> 
>  #ifdef CONFIG_GIC_V3_ITS
> -	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
>  	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
>  	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
>  		debug("%s: failed to init gic-lpi-tables\n", __func__);
> --
> 2.17.1
Z.Q. Hou April 25, 2020, 8:39 a.m. UTC | #2
Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020年4月21日 15:38
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot@lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> align to 64KB
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> > align to 64KB
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > As the lower 16bit of the redistributor pending table is reserved for
> > describing the memory attributes, we must give a 64KB aligned address
> > to the GIC LPI initialization function.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - The #5 of v1 patchset.
> >
> >  board/freescale/lx2160a/lx2160a.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/board/freescale/lx2160a/lx2160a.c
> > b/board/freescale/lx2160a/lx2160a.c
> > index 7f22110dc6..c8e962ce3d 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -17,6 +17,7 @@
> >  #include <asm/io.h>
> >  #include <fdt_support.h>
> >  #include <linux/libfdt.h>
> > +#include <linux/sizes.h>
> >  #include <fsl-mc/fsl_mc.h>
> >  #include <env_internal.h>
> >  #include <efi_loader.h>
> > @@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
> >  	}
> >
> >  #ifdef CONFIG_GIC_V3_ITS
> > -	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> > +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> >  	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> >  	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> >  		debug("%s: failed to init gic-lpi-tables\n", __func__);
> > --
> > 2.17.1
Z.Q. Hou April 25, 2020, 8:40 a.m. UTC | #3
Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020年4月21日 15:38
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot@lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> align to 64KB
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> > align to 64KB
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > As the lower 16bit of the redistributor pending table is reserved for
> > describing the memory attributes, we must give a 64KB aligned address
> > to the GIC LPI initialization function.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - The #5 of v1 patchset.
> >
> >  board/freescale/lx2160a/lx2160a.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/board/freescale/lx2160a/lx2160a.c
> > b/board/freescale/lx2160a/lx2160a.c
> > index 7f22110dc6..c8e962ce3d 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -17,6 +17,7 @@
> >  #include <asm/io.h>
> >  #include <fdt_support.h>
> >  #include <linux/libfdt.h>
> > +#include <linux/sizes.h>
> >  #include <fsl-mc/fsl_mc.h>
> >  #include <env_internal.h>
> >  #include <efi_loader.h>
> > @@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
> >  	}
> >
> >  #ifdef CONFIG_GIC_V3_ITS
> > -	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> > +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> >  	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> >  	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> >  		debug("%s: failed to init gic-lpi-tables\n", __func__);
> > --
> > 2.17.1
diff mbox series

Patch

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 7f22110dc6..c8e962ce3d 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -17,6 +17,7 @@ 
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <efi_loader.h>
@@ -678,7 +679,7 @@  int ft_board_setup(void *blob, bd_t *bd)
 	}
 
 #ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
 	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
 	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
 		debug("%s: failed to init gic-lpi-tables\n", __func__);