| Message ID | 20200327104727.4708-3-kishon@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: cadence: Deprecate inbound/outbound specific bindings | expand |
On Fri, Mar 27, 2020 at 04:17:26PM +0530, Kishon Vijay Abraham I wrote: > Cadence PCIe core dirver (host mode) uses "cdns,no-bar-match-nbits" > property to configure the number of bits passed through from PCIe > address to internal address in Inbound Address Translation register. s/dirver/driver/ I love this series, thanks a lot for doing this! > However standard PCI dt-binding already defines "dma-ranges" to > describe the address range accessible by PCIe controller. Parse > "dma-ranges" property to configure the number of bits passed > through from PCIe address to internal address in Inbound Address > Translation register. > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > drivers/pci/controller/cadence/pcie-cadence-host.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c > index 9b1c3966414b..60f912a657b9 100644 > --- a/drivers/pci/controller/cadence/pcie-cadence-host.c > +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c > @@ -206,8 +206,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) > struct device *dev = rc->pcie.dev; > struct platform_device *pdev = to_platform_device(dev); > struct device_node *np = dev->of_node; > + struct of_pci_range_parser parser; > struct pci_host_bridge *bridge; > struct list_head resources; > + struct of_pci_range range; > struct cdns_pcie *pcie; > struct resource *res; > int ret; > @@ -222,8 +224,15 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) > rc->max_regions = 32; > of_property_read_u32(np, "cdns,max-outbound-regions", &rc->max_regions); > > - rc->no_bar_nbits = 32; > - of_property_read_u32(np, "cdns,no-bar-match-nbits", &rc->no_bar_nbits); > + if (!of_pci_dma_range_parser_init(&parser, np)) > + if (of_pci_range_parser_one(&parser, &range)) > + rc->no_bar_nbits = ilog2(range.size); > + > + if (!rc->no_bar_nbits) { > + rc->no_bar_nbits = 32; > + of_property_read_u32(np, "cdns,no-bar-match-nbits", > + &rc->no_bar_nbits); > + } > > rc->vendor_id = 0xffff; > of_property_read_u16(np, "vendor-id", &rc->vendor_id); > -- > 2.17.1 >
diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c index 9b1c3966414b..60f912a657b9 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-host.c +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c @@ -206,8 +206,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) struct device *dev = rc->pcie.dev; struct platform_device *pdev = to_platform_device(dev); struct device_node *np = dev->of_node; + struct of_pci_range_parser parser; struct pci_host_bridge *bridge; struct list_head resources; + struct of_pci_range range; struct cdns_pcie *pcie; struct resource *res; int ret; @@ -222,8 +224,15 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) rc->max_regions = 32; of_property_read_u32(np, "cdns,max-outbound-regions", &rc->max_regions); - rc->no_bar_nbits = 32; - of_property_read_u32(np, "cdns,no-bar-match-nbits", &rc->no_bar_nbits); + if (!of_pci_dma_range_parser_init(&parser, np)) + if (of_pci_range_parser_one(&parser, &range)) + rc->no_bar_nbits = ilog2(range.size); + + if (!rc->no_bar_nbits) { + rc->no_bar_nbits = 32; + of_property_read_u32(np, "cdns,no-bar-match-nbits", + &rc->no_bar_nbits); + } rc->vendor_id = 0xffff; of_property_read_u16(np, "vendor-id", &rc->vendor_id);
Cadence PCIe core dirver (host mode) uses "cdns,no-bar-match-nbits" property to configure the number of bits passed through from PCIe address to internal address in Inbound Address Translation register. However standard PCI dt-binding already defines "dma-ranges" to describe the address range accessible by PCIe controller. Parse "dma-ranges" property to configure the number of bits passed through from PCIe address to internal address in Inbound Address Translation register. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/pci/controller/cadence/pcie-cadence-host.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)