Message ID | 20200319122737.3063291-6-thierry.reding@gmail.com |
---|---|
State | Deferred |
Headers | show |
Series | pinctrl: tegra: Support SFIO/GPIO programming | expand |
On 3/19/2020 5:57 PM, Thierry Reding wrote: > External email: Use caution opening links or attachments > > > From: Thierry Reding <treding@nvidia.com> > > Properly spell "Schmitt" in the kerneldoc for pin group definitions. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > drivers/pinctrl/tegra/pinctrl-tegra.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h > index 0fc82eea9cf1..520865979d4a 100644 > --- a/drivers/pinctrl/tegra/pinctrl-tegra.h > +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h > @@ -107,7 +107,7 @@ struct tegra_function { > * drvup, slwr, slwf, and drvtype parameters. > * @drv_bank: Drive fields register bank. > * @hsm_bit: High Speed Mode register bit. > - * @schmitt_bit: Scmitt register bit. > + * @schmitt_bit: Schmitt register bit. > * @lpmd_bit: Low Power Mode register bit. > * @drvdn_bit: Drive Down register bit. > * @drvdn_width: Drive Down field width. > -- > 2.24.1 > Tested-by: Vidya Sagar <vidyas@nvidia.com>
On Thu, Mar 19, 2020 at 1:27 PM Thierry Reding <thierry.reding@gmail.com> wrote: > From: Thierry Reding <treding@nvidia.com> > > Properly spell "Schmitt" in the kerneldoc for pin group definitions. > > Signed-off-by: Thierry Reding <treding@nvidia.com> Patch applied! Yours, Linus Walleij
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index 0fc82eea9cf1..520865979d4a 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -107,7 +107,7 @@ struct tegra_function { * drvup, slwr, slwf, and drvtype parameters. * @drv_bank: Drive fields register bank. * @hsm_bit: High Speed Mode register bit. - * @schmitt_bit: Scmitt register bit. + * @schmitt_bit: Schmitt register bit. * @lpmd_bit: Low Power Mode register bit. * @drvdn_bit: Drive Down register bit. * @drvdn_width: Drive Down field width.