Message ID | 20200311135117.9366-8-eric.auger@redhat.com |
---|---|
State | New |
Headers | show |
Series | arm/arm64: Add ITS tests | expand |
On Wed, Mar 11, 2020 at 02:51:11PM +0100, Eric Auger wrote: > +/* must be called after gicv3_enable_defaults */ > +void its_enable_defaults(void) > +{ > + int i; > + > + /* Allocate LPI config and pending tables */ > + gicv3_lpi_alloc_tables(); > + > + for (i = 0; i < nr_cpus; i++) > + gicv3_lpi_rdist_enable(i); You still haven't explained what's wrong with for_each_present_cpu. Also, I see you've added 'i < nr_cpus' loops in arm/gic.c too. I'd prefer we not assume that all cpu's are present (even though, currently, they must be), because we may want to integrate cpu hotplug tests with these tests at some point. > + > + writel(GITS_CTLR_ENABLE, its_data.base + GITS_CTLR); > +} > -- > 2.20.1 > >
Hi Drew, On 3/11/20 4:38 PM, Andrew Jones wrote: > On Wed, Mar 11, 2020 at 02:51:11PM +0100, Eric Auger wrote: >> +/* must be called after gicv3_enable_defaults */ >> +void its_enable_defaults(void) >> +{ >> + int i; >> + >> + /* Allocate LPI config and pending tables */ >> + gicv3_lpi_alloc_tables(); >> + >> + for (i = 0; i < nr_cpus; i++) >> + gicv3_lpi_rdist_enable(i); > > You still haven't explained what's wrong with for_each_present_cpu. The previous comment you did was related to a spurious change I made in gicv3_lpi_alloc_tables. This change was removed in v5: [kvm-unit-tests PATCH v5 05/13] arm/arm64: gicv3: Set the LPI config and pending tables I did not understand from your comment you wanted all locations to use for_each_present_cpu(). I have nothing against it ;-) Also, > I see you've added 'i < nr_cpus' loops in arm/gic.c too. I'd prefer we not > assume that all cpu's are present (even though, currently, they must be), > because we may want to integrate cpu hotplug tests with these tests at > some point. OK Thanks Eric > >> + >> + writel(GITS_CTLR_ENABLE, its_data.base + GITS_CTLR); >> +} >> -- >> 2.20.1 >> >> >
diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h index fedffa8..cb72922 100644 --- a/lib/arm/asm/gic-v3.h +++ b/lib/arm/asm/gic-v3.h @@ -57,6 +57,10 @@ #define LPI_PROP_DEFAULT_PRIO 0xa0 #define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | LPI_PROP_ENABLED) +#define LPI_ID_BASE 8192 +#define LPI(lpi) ((lpi) + LPI_ID_BASE) +#define LPI_OFFSET(intid) ((intid) - LPI_ID_BASE) + #include <asm/arch_gicv3.h> #ifndef __ASSEMBLY__ @@ -93,6 +97,8 @@ extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest); extern void gicv3_set_redist_base(size_t stride); extern void gicv3_lpi_set_clr_pending(int rdist, int n, bool set); extern void gicv3_lpi_alloc_tables(void); +extern void gicv3_lpi_rdist_enable(int redist); +extern void gicv3_lpi_rdist_disable(int redist); static inline void gicv3_do_wait_for_rwp(void *base) { diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c index 6cf1d1d..a7e2cb8 100644 --- a/lib/arm/gic-v3.c +++ b/lib/arm/gic-v3.c @@ -199,4 +199,29 @@ void gicv3_lpi_set_clr_pending(int rdist, int n, bool set) byte &= ~mask; *ptr = byte; } + +static void gicv3_lpi_rdist_ctrl(u32 redist, bool set) +{ + void *ptr; + u64 val; + + assert(redist < nr_cpus); + + ptr = gicv3_data.redist_base[redist]; + val = readl(ptr + GICR_CTLR); + if (set) + val |= GICR_CTLR_ENABLE_LPIS; + else + val &= ~GICR_CTLR_ENABLE_LPIS; + writel(val, ptr + GICR_CTLR); +} + +void gicv3_lpi_rdist_enable(int redist) +{ + gicv3_lpi_rdist_ctrl(redist, true); +} +void gicv3_lpi_rdist_disable(int redist) +{ + gicv3_lpi_rdist_ctrl(redist, false); +} #endif /* __aarch64__ */ diff --git a/lib/arm64/asm/gic-v3-its.h b/lib/arm64/asm/gic-v3-its.h index d46669b..fec6767 100644 --- a/lib/arm64/asm/gic-v3-its.h +++ b/lib/arm64/asm/gic-v3-its.h @@ -88,5 +88,6 @@ extern struct its_data its_data; extern void its_parse_typer(void); extern void its_init(void); extern int its_baser_lookup(int i, struct its_baser *baser); +extern void its_enable_defaults(void); #endif /* _ASMARM64_GIC_V3_ITS_H_ */ diff --git a/lib/arm64/gic-v3-its.c b/lib/arm64/gic-v3-its.c index 4c9c0db..c431f31 100644 --- a/lib/arm64/gic-v3-its.c +++ b/lib/arm64/gic-v3-its.c @@ -97,3 +97,16 @@ void its_init(void) its_cmd_queue_init(); } +/* must be called after gicv3_enable_defaults */ +void its_enable_defaults(void) +{ + int i; + + /* Allocate LPI config and pending tables */ + gicv3_lpi_alloc_tables(); + + for (i = 0; i < nr_cpus; i++) + gicv3_lpi_rdist_enable(i); + + writel(GITS_CTLR_ENABLE, its_data.base + GITS_CTLR); +}