Message ID | 7bce32ccbab3ba3e3e0f27da6961bf6313df97ed.1581663140.git.christophe.leroy@c-s.fr (mailing list archive) |
---|---|
State | Accepted |
Commit | 477f3488a94e35380c82a7498d46f10fa5f3edd2 |
Headers | show |
Series | powerpc/6xx: Fix power_save_ppc32_restore() with CONFIG_VMAP_STACK | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (a5bc6e124219546a81ce334dc9b16483d55e9abf) |
snowpatch_ozlabs/build-ppc64le | success | Build succeeded |
snowpatch_ozlabs/build-ppc64be | success | Build succeeded |
snowpatch_ozlabs/build-ppc64e | success | Build succeeded |
snowpatch_ozlabs/build-pmac32 | success | Build succeeded |
snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 22 lines checked |
snowpatch_ozlabs/needsstable | success | Patch fixes a commit that hasn't been released yet |
On Fri, 2020-02-14 at 06:53:00 UTC, Christophe Leroy wrote: > power_save_ppc32_restore() is called during exception entry, before > re-enabling the MMU. It substracts KERNELBASE from the address > of nap_save_msscr0 to access it. > > With CONFIG_VMAP_STACK enabled, data MMU translation has already been > re-enabled, so power_save_ppc32_restore() has to access > nap_save_msscr0 by its virtual address. > > Reported-by: Larry Finger <Larry.Finger@lwfinger.net> > Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> > Fixes: cd08f109e262 ("powerpc/32s: Enable CONFIG_VMAP_STACK") > Tested-by: Larry Finger <Larry.Finger@lwfinger.net> Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/477f3488a94e35380c82a7498d46f10fa5f3edd2 cheers
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S index 0ffdd18b9f26..433d97bea1f3 100644 --- a/arch/powerpc/kernel/idle_6xx.S +++ b/arch/powerpc/kernel/idle_6xx.S @@ -166,7 +166,11 @@ BEGIN_FTR_SECTION mfspr r9,SPRN_HID0 andis. r9,r9,HID0_NAP@h beq 1f +#ifdef CONFIG_VMAP_STACK + addis r9, r11, nap_save_msscr0@ha +#else addis r9,r11,(nap_save_msscr0-KERNELBASE)@ha +#endif lwz r9,nap_save_msscr0@l(r9) mtspr SPRN_MSSCR0, r9 sync @@ -174,7 +178,11 @@ BEGIN_FTR_SECTION 1: END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR) BEGIN_FTR_SECTION +#ifdef CONFIG_VMAP_STACK + addis r9, r11, nap_save_hid1@ha +#else addis r9,r11,(nap_save_hid1-KERNELBASE)@ha +#endif lwz r9,nap_save_hid1@l(r9) mtspr SPRN_HID1, r9 END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)