| Message ID | 1581743758-4475-1-git-send-email-Anson.Huang@nxp.com |
|---|---|
| Headers | show |
| Series | Add missing UART DCE/DTE pins macro defines | expand |
On Sat, Feb 15, 2020 at 01:15:54PM +0800, Anson Huang wrote: > Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this > is to distinguish the DCE/DTE functions. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > arch/arm/boot/dts/imx6sx-nitrogen6sx.dts | 20 ++++++++++---------- > 1 file changed, 10 insertions(+), 10 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts > index 832b5c5..d84ea69 100644 > --- a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts > +++ b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts > @@ -484,31 +484,31 @@ > > pinctrl_uart1: uart1grp { > fsl,pins = < > - MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 > - MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1 > >; > }; > > pinctrl_uart2: uart2grp { > fsl,pins = < > - MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1 > - MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX 0x1b0b1 > >; > }; > > pinctrl_uart3: uart3grp { > fsl,pins = < > - MX6SX_PAD_QSPI1B_SS0_B__UART3_TX 0x1b0b1 > - MX6SX_PAD_QSPI1B_SCLK__UART3_RX 0x1b0b1 > + MX6SX_PAD_QSPI1B_SS0_B__UART3_DCE_TX 0x1b0b1 > + MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX 0x1b0b1 While reviewing this patch I noticed that the user of this pinctrl group has the property uart-has-rtscts which seems wrong. > >; > }; > > pinctrl_uart5: uart5grp { > fsl,pins = < > - MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1 > - MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1 > - MX6SX_PAD_SD3_DATA6__UART3_RTS_B 0x1b0b1 > - MX6SX_PAD_SD3_DATA7__UART3_CTS_B 0x1b0b1 > + MX6SX_PAD_KEY_COL3__UART5_DCE_TX 0x1b0b1 > + MX6SX_PAD_KEY_ROW3__UART5_DCE_RX 0x1b0b1 > + MX6SX_PAD_SD3_DATA6__UART3_DCE_RTS 0x1b0b1 > + MX6SX_PAD_SD3_DATA7__UART3_DCE_CTS 0x1b0b1 While the property is missing in &uart5. But the patch is fine, so: Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Best regards Uwe
On Sat, Feb 15, 2020 at 01:15:55PM +0800, Anson Huang wrote: > Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this > is to distinguish the DCE/DTE functions. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > arch/arm/boot/dts/imx6sx-sabreauto.dts | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts > index 315044c..8259244 100644 > --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts > +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts > @@ -229,8 +229,8 @@ > > pinctrl_uart1: uart1grp { > fsl,pins = < > - MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 > - MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1 > + MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1 Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
On Sat, Feb 15, 2020 at 01:15:56PM +0800, Anson Huang wrote: > Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this > is to distinguish the DCE/DTE functions. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
On Sat, Feb 15, 2020 at 01:15:57PM +0800, Anson Huang wrote: > Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this > is to distinguish the DCE/DTE functions. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
On Sat, Feb 15, 2020 at 01:15:58PM +0800, Anson Huang wrote: > Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this > is to distinguish the DCE/DTE functions. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Thanks Uwe
The patch set is to add missing UART DCE/DTE pins, because of previous UART pins macro defines do NOT contain DCE/DTE, per the advice from Uwe in V1 patch comment, to better distinguish the DCE/DTE functions, I change the existing UART pins to contain the DCE/DTE, then add the missing UART pins, meanwhile, keep the old macro definis there for some time in order to make it backward compatible, and then, switch the existing consumer DTs to use new UART pins macro defines with DCE/DTE inside. As the changes in V2 is significant compared to V1, so I did NOT put a change log in each patch, you can treat each patch as new patch, thanks. Anson Huang (7): ARM: dts: imx6sx: Improve UART pins macro defines ARM: dts: imx6sx: Add missing UART RTS/CTS pins mux ARM: dts: imx6sx-nitrogen6sx: Use new pin names with DCE/DTE for UART pins ARM: dts: imx6sx-sabreauto: Use new pin names with DCE/DTE for UART pins ARM: dts: imx6sx-sdb: Use new pin names with DCE/DTE for UART pins ARM: dts: imx6sx-softing-vining-2000: Use new pin names with DCE/DTE for UART pins ARM: dts: imx6sx-udoo-neo: Use new pin names with DCE/DTE for UART pins arch/arm/boot/dts/imx6sx-nitrogen6sx.dts | 20 +- arch/arm/boot/dts/imx6sx-pinfunc.h | 288 ++++++++++++++++------- arch/arm/boot/dts/imx6sx-sabreauto.dts | 4 +- arch/arm/boot/dts/imx6sx-sdb.dtsi | 12 +- arch/arm/boot/dts/imx6sx-softing-vining-2000.dts | 8 +- arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 28 +-- 6 files changed, 237 insertions(+), 123 deletions(-)