| Message ID | 94b5b51d-6883-2ec6-9d7c-9081512dba0a@gmail.com |
|---|---|
| State | Accepted |
| Commit | 404339759ef5e0bcd4fa7768d1148b1ace2d2bb6 |
| Delegated to: | Andes |
| Headers | show |
| Series | riscv: Remove unnecessary instruction | expand |
> From: Sean Anderson [mailto:seanga2@gmail.com] > Sent: Tuesday, January 28, 2020 5:40 AM > To: U-Boot Mailing List > Cc: Bin Meng; Lukas Auer; Anup.Patel@wdc.com; Rick Jian-Zhi Chen(陳建志) > Subject: [PATCH] riscv: Remove unnecessary instruction > > The add instruction on risc-v can have any three sources and targets, so there is no need for an intermediate mov. > > Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> > --- > arch/riscv/cpu/start.S | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 1a55b7d570..365163ad19 100644 > --- a/arch/riscv/cpu/start.S > +++ b/arch/riscv/cpu/start.S > @@ -359,9 +359,8 @@ relocate_secondary_harts: > call_board_init_r: > jal invalidate_icache_all > jal flush_dcache_all > - la t0, board_init_r > - mv t4, t0 /* offset of board_init_r() */ > - add t4, t4, t6 /* real address of board_init_r() */ > + la t0, board_init_r /* offset of board_init_r() */ > + add t4, t0, t6 /* real address of board_init_r() */ > /* > * setup parameters for board_init_r > */ > --
On Tue, Jan 28, 2020 at 5:39 AM Sean Anderson <seanga2@gmail.com> wrote: > > The add instruction on risc-v can have any three sources and targets, so there > is no need for an intermediate mov. > > Signed-off-by: Sean Anderson <seanga2@gmail.com> > --- > arch/riscv/cpu/start.S | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 1a55b7d570..365163ad19 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -359,9 +359,8 @@ relocate_secondary_harts: call_board_init_r: jal invalidate_icache_all jal flush_dcache_all - la t0, board_init_r - mv t4, t0 /* offset of board_init_r() */ - add t4, t4, t6 /* real address of board_init_r() */ + la t0, board_init_r /* offset of board_init_r() */ + add t4, t0, t6 /* real address of board_init_r() */ /* * setup parameters for board_init_r */
The add instruction on risc-v can have any three sources and targets, so there is no need for an intermediate mov. Signed-off-by: Sean Anderson <seanga2@gmail.com> --- arch/riscv/cpu/start.S | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)