| Message ID | DBBPR08MB4775E0A19EB73804879BBC009B710@DBBPR08MB4775.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
| Series | [ARM,3/x] : MVE ACLE intrinsics framework patch. | expand |
Hi Srinath, On 11/14/19 7:12 PM, Srinath Parvathaneni wrote: > Hello, > > This patch is part of MVE ACLE intrinsics framework. > > The patch supports the use of emulation for the double-precision > arithmetic > operations for MVE. This changes are to support the MVE ACLE > intrinsics which > operates on vector floating point arithmetic operations. > > Please refer to Arm reference manual [1] for more details. > [1] > https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf?_ga=2.102521798.659307368.1572453718-1501600630.1548848914 > > Regression tested on arm-none-eabi and found no regressions. > > Ok for trunk? > > Thanks, > Srinath. > > gcc/ChangeLog: > > 2019-11-11 Andre Vieira <andre.simoesdiasvieira@arm.com> > Srinath Parvathaneni <srinath.parvathaneni@arm.com> > > * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify > function to add > emulator calls for dobule precision arithmetic operations for MVE. I'm a bit confused by the changelog and the comment in the patch.... > > > ############### Attachment also inlined for ease of reply > ############### > > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index > 6faed76206b93c1a9dea048e2f693dc16ee58072..358b2638b65a2007d1c7e8062844b67682597f45 > 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -5658,9 +5658,25 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) > /* Values from double-precision helper functions are returned > in core > registers if the selected core only supports single-precision > arithmetic, even if we are using the hard-float ABI. The > same is > - true for single-precision helpers, but we will never be using the > - hard-float ABI on a CPU which doesn't support single-precision > - operations in hardware. */ > + true for single-precision helpers except in case of MVE, > because in > + MVE we will be using the hard-float ABI on a CPU which > doesn't support > + single-precision operations in hardware. In MVE the > following check > + enables use of emulation for the double-precision arithmetic > + operations. */ > + if (TARGET_HAVE_MVE) > + { > + add_libcall (libcall_htab, optab_libfunc (add_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (sdiv_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (smul_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (neg_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (sub_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (eq_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (lt_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (le_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (ge_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (gt_optab, SFmode)); > + add_libcall (libcall_htab, optab_libfunc (unord_optab, SFmode)); > + } ... this adds emulation for SFmode but you say you want double-precision emulation? Can you demonstrate what this patch wants to achieve with a testcase? Thanks, Kyrill > add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode)); > add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode)); > add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode)); >
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6faed76206b93c1a9dea048e2f693dc16ee58072..358b2638b65a2007d1c7e8062844b67682597f45 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -5658,9 +5658,25 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) /* Values from double-precision helper functions are returned in core registers if the selected core only supports single-precision arithmetic, even if we are using the hard-float ABI. The same is - true for single-precision helpers, but we will never be using the - hard-float ABI on a CPU which doesn't support single-precision - operations in hardware. */ + true for single-precision helpers except in case of MVE, because in + MVE we will be using the hard-float ABI on a CPU which doesn't support + single-precision operations in hardware. In MVE the following check + enables use of emulation for the double-precision arithmetic + operations. */ + if (TARGET_HAVE_MVE) + { + add_libcall (libcall_htab, optab_libfunc (add_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (sdiv_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (smul_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (neg_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (sub_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (eq_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (lt_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (le_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (ge_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (gt_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (unord_optab, SFmode)); + } add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode)); add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode)); add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));
Hello, This patch is part of MVE ACLE intrinsics framework. The patch supports the use of emulation for the double-precision arithmetic operations for MVE. This changes are to support the MVE ACLE intrinsics which operates on vector floating point arithmetic operations. Please refer to Arm reference manual [1] for more details. [1] https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf?_ga=2.102521798.659307368.1572453718-1501600630.1548848914 Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-11 Andre Vieira <andre.simoesdiasvieira@arm.com> Srinath Parvathaneni <srinath.parvathaneni@arm.com> * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add emulator calls for dobule precision arithmetic operations for MVE. ############### Attachment also inlined for ease of reply ############### diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6faed76206b93c1a9dea048e2f693dc16ee58072..358b2638b65a2007d1c7e8062844b67682597f45 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -5658,9 +5658,25 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) /* Values from double-precision helper functions are returned in core registers if the selected core only supports single-precision arithmetic, even if we are using the hard-float ABI. The same is - true for single-precision helpers, but we will never be using the - hard-float ABI on a CPU which doesn't support single-precision - operations in hardware. */ + true for single-precision helpers except in case of MVE, because in + MVE we will be using the hard-float ABI on a CPU which doesn't support + single-precision operations in hardware. In MVE the following check + enables use of emulation for the double-precision arithmetic + operations. */ + if (TARGET_HAVE_MVE) + { + add_libcall (libcall_htab, optab_libfunc (add_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (sdiv_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (smul_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (neg_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (sub_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (eq_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (lt_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (le_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (ge_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (gt_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (unord_optab, SFmode)); + } add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode)); add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode)); add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));