| Message ID | 0101016ef36a5d13-457e6678-2e83-494e-8494-1b0776d5b7e4-000000@us-west-2.amazonses.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] dt-bindings: pinctrl: qcom: Add new qup functions for sc7180 | expand |
On Tue 10 Dec 21:24 PST 2019, Rajendra Nayak wrote: > Add new qup functions for qup02/04/11 and qup13 wherein multiple > functions (for i2c and uart) share the same pin. This allows users > to identify which specific qup function for the instance one needs > to use for the pin. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt > index b5767ee..6ffeac9 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt > @@ -125,8 +125,9 @@ to specify in a pin configuration subnode: > mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag, > PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss, > qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs, > - qspi_data, qup00, qup01, qup02, qup03, qup04, qup05, > - qup10, qup11, qup12, qup13, qup14, qup15, sdc1_tb, > + qspi_data, qup00, qup01, qup02_i2c, qup02_uart, qup03, > + qup04_i2c, qup04_uart, qup05, qup10, qup11_i2c, qup11_uart, > + qup12, qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb, > sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, > tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt, > usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >
Quoting Rajendra Nayak (2019-12-10 21:24:24) > Add new qup functions for qup02/04/11 and qup13 wherein multiple > functions (for i2c and uart) share the same pin. This allows users > to identify which specific qup function for the instance one needs > to use for the pin. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt index b5767ee..6ffeac9 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt @@ -125,8 +125,9 @@ to specify in a pin configuration subnode: mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag, PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss, qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs, - qspi_data, qup00, qup01, qup02, qup03, qup04, qup05, - qup10, qup11, qup12, qup13, qup14, qup15, sdc1_tb, + qspi_data, qup00, qup01, qup02_i2c, qup02_uart, qup03, + qup04_i2c, qup04_uart, qup05, qup10, qup11_i2c, qup11_uart, + qup12, qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb, sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt, usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT,
Add new qup functions for qup02/04/11 and qup13 wherein multiple functions (for i2c and uart) share the same pin. This allows users to identify which specific qup function for the instance one needs to use for the pin. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)