RFA: another patch to solve PR49154

On Thu, 26 May 2011, Vladimir Makarov wrote:
> On 05/26/2011 04:47 AM, Hans-Peter Nilsson wrote:
> > On Wed, 25 May 2011, Vladimir Makarov wrote:
> > It sounds like you're saying that "the narrowest register
> > classes must be formed of registers for which there are trivial
> > instructions to move between registers inside the class"?
> >
> No it is wrong.  For example, SPARC FPCC (floating point control code
> registers) should form a uniform class but there are no trvial insns to move
> between registers inside the class.

Yah, the code was tweaked to explicitly handle that case by
excluding that condition for regclasses without subclasses.

Is the following update ok with you (and doc maintainers)?
It says what the code requires, and seems a simple enough rule.
It also fills a documentation gap at the narrow end of the
spectrum of register classes.  (I'll update the CRIS port to fit.)

If not, I can tweak the code instead (likely to also exclude the
test for the narrowest code class to which a register belongs),
and regtest that on the compilefarm machines, which IIRC should
cover all the arch's you tested.  But that'd require the code to
keep handling non-minimal regclasses with side-conditions on
moves as pressure classes, which seems less desirable to me, and
judging from your willingness to patch a target the other way, I
believe you agree. ;-)

Tested by generating and inspecting dvi and info.

gcc:
	* doc/tm.texi.in (Register Classes): Document rule for the narrowest
	register classes.
	* doc/tm.texi: Regenerate.


brgds, H-P

On Sat, 28 May 2011, Hans-Peter Nilsson wrote:
> +You must define the narrowest register class for a register so that
> +class either has no subclasses, or that for some mode, the move cost
> +between registers within the class are cheaper than moving a register

Bah: "is cheaper" is the grammatically correct version.
(N.B. there is only one cost per class.)

brgds, H-P

Hans-Peter Nilsson <hp@bitrange.com> writes:
> Index: tm.texi.in
> ===================================================================
> --- tm.texi.in	(revision 174376)
> +++ tm.texi.in	(working copy)
> @@ -2327,6 +2327,11 @@ constraints is through machine-dependent
>  You can define such letters to correspond to various classes, then use
>  them in operand constraints.
>
> +You must define the narrowest register class for a register so that
> +class either has no subclasses, or that for some mode, the move cost
> +between registers within the class are cheaper than moving a register
> +in the class to or from memory (@pxref{Costs}).
> +

I fear this isn't true for some MIPS classes.

Richard

On Tue, 31 May 2011, Richard Sandiford wrote:

> Hans-Peter Nilsson <hp@bitrange.com> writes:
> > Index: tm.texi.in
> > ===================================================================
> > --- tm.texi.in	(revision 174376)
> > +++ tm.texi.in	(working copy)
> > @@ -2327,6 +2327,11 @@ constraints is through machine-dependent
> >  You can define such letters to correspond to various classes, then use
> >  them in operand constraints.
> >
> > +You must define the narrowest register class for a register so that
> > +class either has no subclasses, or that for some mode, the move cost
> > +between registers within the class are cheaper than moving a register
> > +in the class to or from memory (@pxref{Costs}).
> > +
>
> I fear this isn't true for some MIPS classes.

I fear the assert will strike then, when there are allocatable
registers in such a class. :)

You don't happen to have target and options to cc1?

brgds, H-P

Hans-Peter Nilsson <hp@bitrange.com> writes:
> On Tue, 31 May 2011, Richard Sandiford wrote:
>> Hans-Peter Nilsson <hp@bitrange.com> writes:
>> > Index: tm.texi.in
>> > ===================================================================
>> > --- tm.texi.in	(revision 174376)
>> > +++ tm.texi.in	(working copy)
>> > @@ -2327,6 +2327,11 @@ constraints is through machine-dependent
>> >  You can define such letters to correspond to various classes, then use
>> >  them in operand constraints.
>> >
>> > +You must define the narrowest register class for a register so that
>> > +class either has no subclasses, or that for some mode, the move cost
>> > +between registers within the class are cheaper than moving a register
>> > +in the class to or from memory (@pxref{Costs}).
>> > +
>>
>> I fear this isn't true for some MIPS classes.
>
> I fear the assert will strike then, when there are allocatable
> registers in such a class. :)
>
> You don't happen to have target and options to cc1?

Gah, seems like I'd forgotten the "no subclasses" bit by the time
I started looking at code.  Sorry for the false alarm.

Richard