Message ID | alpine.BSF.2.00.1105272328020.32881@dair.pair.com |
---|---|
State | New |
Headers | show |
On Sat, 28 May 2011, Hans-Peter Nilsson wrote: > +You must define the narrowest register class for a register so that > +class either has no subclasses, or that for some mode, the move cost > +between registers within the class are cheaper than moving a register Bah: "is cheaper" is the grammatically correct version. (N.B. there is only one cost per class.) brgds, H-P
Hans-Peter Nilsson <hp@bitrange.com> writes: > Index: tm.texi.in > =================================================================== > --- tm.texi.in (revision 174376) > +++ tm.texi.in (working copy) > @@ -2327,6 +2327,11 @@ constraints is through machine-dependent > You can define such letters to correspond to various classes, then use > them in operand constraints. > > +You must define the narrowest register class for a register so that > +class either has no subclasses, or that for some mode, the move cost > +between registers within the class are cheaper than moving a register > +in the class to or from memory (@pxref{Costs}). > + I fear this isn't true for some MIPS classes. Richard
On Tue, 31 May 2011, Richard Sandiford wrote: > Hans-Peter Nilsson <hp@bitrange.com> writes: > > Index: tm.texi.in > > =================================================================== > > --- tm.texi.in (revision 174376) > > +++ tm.texi.in (working copy) > > @@ -2327,6 +2327,11 @@ constraints is through machine-dependent > > You can define such letters to correspond to various classes, then use > > them in operand constraints. > > > > +You must define the narrowest register class for a register so that > > +class either has no subclasses, or that for some mode, the move cost > > +between registers within the class are cheaper than moving a register > > +in the class to or from memory (@pxref{Costs}). > > + > > I fear this isn't true for some MIPS classes. I fear the assert will strike then, when there are allocatable registers in such a class. :) You don't happen to have target and options to cc1? brgds, H-P
Hans-Peter Nilsson <hp@bitrange.com> writes: > On Tue, 31 May 2011, Richard Sandiford wrote: >> Hans-Peter Nilsson <hp@bitrange.com> writes: >> > Index: tm.texi.in >> > =================================================================== >> > --- tm.texi.in (revision 174376) >> > +++ tm.texi.in (working copy) >> > @@ -2327,6 +2327,11 @@ constraints is through machine-dependent >> > You can define such letters to correspond to various classes, then use >> > them in operand constraints. >> > >> > +You must define the narrowest register class for a register so that >> > +class either has no subclasses, or that for some mode, the move cost >> > +between registers within the class are cheaper than moving a register >> > +in the class to or from memory (@pxref{Costs}). >> > + >> >> I fear this isn't true for some MIPS classes. > > I fear the assert will strike then, when there are allocatable > registers in such a class. :) > > You don't happen to have target and options to cc1? Gah, seems like I'd forgotten the "no subclasses" bit by the time I started looking at code. Sorry for the false alarm. Richard
Index: tm.texi.in =================================================================== --- tm.texi.in (revision 174376) +++ tm.texi.in (working copy) @@ -2327,6 +2327,11 @@ constraints is through machine-dependent You can define such letters to correspond to various classes, then use them in operand constraints. +You must define the narrowest register class for a register so that +class either has no subclasses, or that for some mode, the move cost +between registers within the class are cheaper than moving a register +in the class to or from memory (@pxref{Costs}). + You should define a class for the union of two classes whenever some instruction allows both classes. For example, if an instruction allows either a floating point (coprocessor) register or a general register for a