Message ID | 20191021095436.50303-2-vadivel.muruganx.ramuthevar@linux.intel.com |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | phy: intel,lgm-emmc-phy: Add support for eMMC PHY on Intel LGM SoC | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | warning | "total: 0 errors, 1 warnings, 63 lines checked" |
robh/dt-meta-schema | fail | build log |
On Mon, Oct 21, 2019 at 05:54:35PM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > > Add a YAML schema to use the host controller driver with the > eMMC PHY on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > --- > --- > .../bindings/phy/intel,lgm-emmc-phy.yaml | 63 ++++++++++++++++++++++ > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml > new file mode 100644 > index 000000000000..bc1285be31f9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml > @@ -0,0 +1,63 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings > + > +maintainers: > + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > + > +description: Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon > + node is used to reference the base address of eMMC phy registers. > + > +select: You don't need a 'select'. > + properties: > + compatible: > + items: > + - const: intel,lgm-syscon > + - const: intel,lgm-emmc-phy This is not right. You are saying 'compatible' must be: compatible = "intel,lgm-syscon", "intel,lgm-emmc-phy"; > + > + reg: > + maxItems: 1 > + > + required: > + - compatible > + - reg > + > +properties: > + "#phy-cells": > + const: 0 > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + maxItems: 1 > + > +required: > + - "#phy-cells" > + - compatible > + - reg > + - clocks > + - clock-names > + > +examples: > + - | > + sysconf: chiptop@e0200000 { > + compatible = "intel,lgm-syscon"; > + reg = <0xe0200000 0x100>; > + > + emmc-phy: emmc-phy { phy@a8 What else in in the chiptop block? > + compatible = "intel,lgm-emmc-phy"; > + reg = <0x00a8 0x10>; > + clocks = <&emmc>; > + clock-names = "emmcclk"; > + #phy-cells = <0>; > + }; > + }; > +... > -- > 2.11.0 >
Hi Rob, On 29/10/2019 11:48 PM, Rob Herring wrote: > On Mon, Oct 21, 2019 at 05:54:35PM +0800, Ramuthevar,Vadivel MuruganX wrote: >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> >> Add a YAML schema to use the host controller driver with the >> eMMC PHY on Intel's Lightning Mountain SoC. >> >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> --- >> --- >> .../bindings/phy/intel,lgm-emmc-phy.yaml | 63 ++++++++++++++++++++++ >> 1 file changed, 63 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml >> >> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml >> new file mode 100644 >> index 000000000000..bc1285be31f9 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml >> @@ -0,0 +1,63 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings >> + >> +maintainers: >> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> + >> +description: Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon >> + node is used to reference the base address of eMMC phy registers. >> + >> +select: > You don't need a 'select'. Thanks for the review. will remove it. >> + properties: >> + compatible: >> + items: >> + - const: intel,lgm-syscon >> + - const: intel,lgm-emmc-phy > This is not right. You are saying 'compatible' must be: > > compatible = "intel,lgm-syscon", "intel,lgm-emmc-phy"; Agreed!, Added like the below statement... - compatible: Should be one of the following: "intel,lgm-syscon", "syscon" - reg: maxItems: 1 properties: compatible: contains: const: intel,lgm-emmc-phy >> + >> + reg: >> + maxItems: 1 >> + >> + required: >> + - compatible >> + - reg >> + >> +properties: >> + "#phy-cells": >> + const: 0 >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + maxItems: 1 >> + >> +required: >> + - "#phy-cells" >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + >> +examples: >> + - | >> + sysconf: chiptop@e0200000 { >> + compatible = "intel,lgm-syscon"; >> + reg = <0xe0200000 0x100>; >> + >> + emmc-phy: emmc-phy { > phy@a8 add it in the next patch. > What else in in the chiptop block? chiptop don't have other properties except compatible and reg. --- With Best Regards Vadivel > >> + compatible = "intel,lgm-emmc-phy"; >> + reg = <0x00a8 0x10>; >> + clocks = <&emmc>; >> + clock-names = "emmcclk"; >> + #phy-cells = <0>; >> + }; >> + }; >> +... >> -- >> 2.11.0 >>
diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml new file mode 100644 index 000000000000..bc1285be31f9 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings + +maintainers: + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> + +description: Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon + node is used to reference the base address of eMMC phy registers. + +select: + properties: + compatible: + items: + - const: intel,lgm-syscon + - const: intel,lgm-emmc-phy + + reg: + maxItems: 1 + + required: + - compatible + - reg + +properties: + "#phy-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + +required: + - "#phy-cells" + - compatible + - reg + - clocks + - clock-names + +examples: + - | + sysconf: chiptop@e0200000 { + compatible = "intel,lgm-syscon"; + reg = <0xe0200000 0x100>; + + emmc-phy: emmc-phy { + compatible = "intel,lgm-emmc-phy"; + reg = <0x00a8 0x10>; + clocks = <&emmc>; + clock-names = "emmcclk"; + #phy-cells = <0>; + }; + }; +...