| Message ID | 4DCD6327.2050508@redhat.com |
|---|---|
| State | New |
| Headers | show |
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 05/13/11 10:58, Vladimir Makarov wrote: > The following patch solves the problem described on > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48971 > > The patch was successfully bootstrapped on x86-64 and checked for ppc64, > ia64, i686-linux, i686-apple-darwin, mips, arm, s390x, and sparc with > and without -msoft-float. > > Is it ok to submit to the trunk? > > 2011-05-13 Vladimir Makarov <vmakarov@redhat.com> > > PR rtl-optimization/48971 > * ira.c (setup_pressure_classes): Don't check register move cost > for classes with one registers. Don't add pressure class if there > is a pressure class with the same available hard registers. > Check contains_reg_of_mode. Fix a typo in collecting > temp_hard_regset. Ignore hard registers not belonging to a class. OK. Jeff -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJN2n2/AAoJEBRtltQi2kC7OqcIAIs/NO3p6UclzUe7LLuP+8SK oAI+0Kjy1/nkbXdpk594p8P3A2z3H0fhPwy2VjTfckE8oL1wPd7nsvdjzZiLdkvC /nt75FZSY7kDledH3pvgbh7UNFLr0DczDsySwaalDuHn6R6IiQeqZO+BcvL5futg LHtbr6HXNoSONulCiStLNjGn1w24LrRXS/SY0PEUrQnG2D1JCGcFVbmwQexlj7dl HjkNkMrHgi1vWrK5GGUH6ywSk0aKCjGERdLBQCLFMTSO14VcCE+0Pq5mKyf7oKBF eSfq9kNNB3HPvloktHd0R5X8cBA+u4Df8H6fqiBZQwxCdoOG79XV4zlrd54944M= =gDkn -----END PGP SIGNATURE-----
On Fri, 13 May 2011, Vladimir Makarov wrote: > The following patch solves the problem described on > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48971 > > The patch was successfully bootstrapped on x86-64 and checked for ppc64, ia64, > i686-linux, i686-apple-darwin, mips, arm, s390x, and sparc with and without > -msoft-float. > > Is it ok to submit to the trunk? > > 2011-05-13 Vladimir Makarov <vmakarov@redhat.com> > > PR rtl-optimization/48971 > * ira.c (setup_pressure_classes): Don't check register move cost > for classes with one registers. Don't add pressure class if there > is a pressure class with the same available hard registers. > Check contains_reg_of_mode. Fix a typo in collecting > temp_hard_regset. Ignore hard registers not belonging to a class. > It seems this broke cris-elf: PR49154. brgds, H-P
On 11-05-24 8:24 PM, Hans-Peter Nilsson wrote: > On Fri, 13 May 2011, Vladimir Makarov wrote: >> The following patch solves the problem described on >> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48971 >> >> The patch was successfully bootstrapped on x86-64 and checked for ppc64, ia64, >> i686-linux, i686-apple-darwin, mips, arm, s390x, and sparc with and without >> -msoft-float. >> >> Is it ok to submit to the trunk? >> >> 2011-05-13 Vladimir Makarov<vmakarov@redhat.com> >> >> PR rtl-optimization/48971 >> * ira.c (setup_pressure_classes): Don't check register move cost >> for classes with one registers. Don't add pressure class if there >> is a pressure class with the same available hard registers. >> Check contains_reg_of_mode. Fix a typo in collecting >> temp_hard_regset. Ignore hard registers not belonging to a class. >> > It seems this broke cris-elf: PR49154. Thanks for reporting this. It was a very sensitive change therefore I checked so many targets (about 10) but apparently not all of them. I'll look at the CRIS problem tomorrow.
> Thanks for reporting this. It was a very sensitive change therefore I > checked so many targets (about 10) but apparently not all of them. I'll > look at the CRIS problem tomorrow. This broke SPARC (in default mode) as well: eric@atlantis:~/build/gcc/sparc-sun-solaris2.9> cat t.c int main (void) { return 0; } eric@atlantis:~/build/gcc/sparc-sun-solaris2.9> gcc/xgcc -Bgcc -S t.c t.c:1:0: internal compiler error: in setup_pressure_classes, at ira.c:902 Please submit a full bug report, with preprocessed source if appropriate. See <http://gcc.gnu.org/bugs.html> for instructions.
On 05/25/2011 04:26 PM, Eric Botcazou wrote: >> Thanks for reporting this. It was a very sensitive change therefore I >> checked so many targets (about 10) but apparently not all of them. I'll >> look at the CRIS problem tomorrow. > This broke SPARC (in default mode) as well: > > eric@atlantis:~/build/gcc/sparc-sun-solaris2.9> cat t.c > int main (void) { return 0; } > eric@atlantis:~/build/gcc/sparc-sun-solaris2.9> gcc/xgcc -Bgcc -S t.c > t.c:1:0: internal compiler error: in setup_pressure_classes, at ira.c:902 > Please submit a full bug report, > with preprocessed source if appropriate. > See<http://gcc.gnu.org/bugs.html> for instructions. > I am working on it. I'll send a patch at the end of the day.
Index: ira.c =================================================================== --- ira.c (revision 173706) +++ ira.c (working copy) @@ -799,27 +799,30 @@ setup_pressure_classes (void) { if (ira_available_class_regs[cl] == 0) continue; - /* Check that the moves between any hard registers of the - current class are not more expensive for a legal mode than - load/store of the hard registers of the current class. Such - class is a potential candidate to be a register pressure - class. */ - for (m = 0; m < NUM_MACHINE_MODES; m++) + if (ira_available_class_regs[cl] != 1) { - COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]); - AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs); - AND_COMPL_HARD_REG_SET (temp_hard_regset, - ira_prohibited_class_mode_regs[cl][m]); - if (hard_reg_set_empty_p (temp_hard_regset)) + /* Check that the moves between any hard registers of the + current class are not more expensive for a legal mode + than load/store of the hard registers of the current + class. Such class is a potential candidate to be a + register pressure class. */ + for (m = 0; m < NUM_MACHINE_MODES; m++) + { + COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]); + AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs); + AND_COMPL_HARD_REG_SET (temp_hard_regset, + ira_prohibited_class_mode_regs[cl][m]); + if (hard_reg_set_empty_p (temp_hard_regset)) + continue; + ira_init_register_move_cost_if_necessary ((enum machine_mode) m); + cost = ira_register_move_cost[m][cl][cl]; + if (cost <= ira_max_memory_move_cost[m][cl][1] + || cost <= ira_max_memory_move_cost[m][cl][0]) + break; + } + if (m >= NUM_MACHINE_MODES) continue; - ira_init_register_move_cost_if_necessary ((enum machine_mode) m); - cost = ira_register_move_cost[m][cl][cl]; - if (cost <= ira_max_memory_move_cost[m][cl][1] - || cost <= ira_max_memory_move_cost[m][cl][0]) - break; } - if (m >= NUM_MACHINE_MODES) - continue; curr = 0; insert_p = true; COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]); @@ -848,6 +851,8 @@ setup_pressure_classes (void) && (! hard_reg_set_equal_p (temp_hard_regset2, temp_hard_regset) || cl == (int) GENERAL_REGS)) continue; + if (hard_reg_set_equal_p (temp_hard_regset2, temp_hard_regset)) + insert_p = false; pressure_classes[curr++] = (enum reg_class) cl2; } /* If the current candidate is a subset of a so far added @@ -858,23 +863,44 @@ setup_pressure_classes (void) n = curr; } #ifdef ENABLE_IRA_CHECKING - /* Check pressure classes correctness: here we check that hard - registers from all register pressure classes contains all hard - registers available for the allocation. */ - CLEAR_HARD_REG_SET (temp_hard_regset); - CLEAR_HARD_REG_SET (temp_hard_regset2); - for (cl = 0; cl < LIM_REG_CLASSES; cl++) - { - for (i = 0; i < n; i++) - if ((int) pressure_classes[i] == cl) - break; - IOR_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl]); - if (i >= n) - IOR_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]); - } - AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs); - AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs); - ira_assert (hard_reg_set_subset_p (temp_hard_regset2, temp_hard_regset)); + { + HARD_REG_SET ignore_hard_regs; + + /* Check pressure classes correctness: here we check that hard + registers from all register pressure classes contains all hard + registers available for the allocation. */ + CLEAR_HARD_REG_SET (temp_hard_regset); + CLEAR_HARD_REG_SET (temp_hard_regset2); + COPY_HARD_REG_SET (ignore_hard_regs, no_unit_alloc_regs); + for (cl = 0; cl < LIM_REG_CLASSES; cl++) + { + /* For some targets (like MIPS with MD_REGS), there are some + classes with hard registers available for allocation but + not able to hold value of any mode. */ + for (m = 0; m < NUM_MACHINE_MODES; m++) + if (contains_reg_of_mode[cl][m]) + break; + if (m >= NUM_MACHINE_MODES) + { + IOR_HARD_REG_SET (ignore_hard_regs, reg_class_contents[cl]); + continue; + } + for (i = 0; i < n; i++) + if ((int) pressure_classes[i] == cl) + break; + IOR_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl]); + if (i < n) + IOR_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]); + } + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + /* Some targets (like SPARC with ICC reg) have alocatable regs + for which no reg class is defined. */ + if (REGNO_REG_CLASS (i) == NO_REGS) + SET_HARD_REG_BIT (ignore_hard_regs, i); + AND_COMPL_HARD_REG_SET (temp_hard_regset, ignore_hard_regs); + AND_COMPL_HARD_REG_SET (temp_hard_regset2, ignore_hard_regs); + ira_assert (hard_reg_set_subset_p (temp_hard_regset2, temp_hard_regset)); + } #endif ira_pressure_classes_num = 0; for (i = 0; i < n; i++)
The following patch solves the problem described on http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48971 The patch was successfully bootstrapped on x86-64 and checked for ppc64, ia64, i686-linux, i686-apple-darwin, mips, arm, s390x, and sparc with and without -msoft-float. Is it ok to submit to the trunk? 2011-05-13 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/48971 * ira.c (setup_pressure_classes): Don't check register move cost for classes with one registers. Don't add pressure class if there is a pressure class with the same available hard registers. Check contains_reg_of_mode. Fix a typo in collecting temp_hard_regset. Ignore hard registers not belonging to a class.