| Message ID | ce203f3a-2e41-05cf-5594-03e2c7eabba1@foss.arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [arm,committed] Fix use of CRC32 intrinsics with Armv8-a and hard-float | expand |
On 8/22/19 4:53 PM, Kyrill Tkachov wrote: > Hi all, > > We currently have a nasty error when trying to use the __crc* > intrinsics with an -mfloat-abi=hard. > That is because the target pragma guarding them uses armv8-a+crc that > does not include fp by default. > So we get errors like: > error: '-mfloat-abi=hard': selected processor lacks an FPU > > This patch fixes that by using an FP-enabled arch target pragma to > guard these intrinsics when floating-point is available. > That way both the softfloat and hardfloat variants work. > > Bootstrapped and tested on arm-none-linux-gnueabihf. > > Committing to trunk. Will backport to branches later. > Now backported to GCC 9 and 8 branches after bootstrapping and testing there. Will do GCC 7 once I get more testing cycles. Thanks, Kyrill > Thanks, > Kyrill > > 2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > * config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32 > intrinsics if __ARM_FP. > Use __ARM_FEATURE_CRC32 ifdef guard. > > 2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > * gcc.target/arm/acle/crc_hf_1.c: New test. >
diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h index 2c7acc698ea50e0cd539a7d9647498746cd1536f..6857ab1787df0ffa672e5078e5a0b9c9cc52e695 100644 --- a/gcc/config/arm/arm_acle.h +++ b/gcc/config/arm/arm_acle.h @@ -174,8 +174,12 @@ __arm_mrrc2 (const unsigned int __coproc, const unsigned int __opc1, #endif /* (!__thumb__ || __thumb2__) && __ARM_ARCH >= 4. */ #pragma GCC push_options -#if __ARM_ARCH >= 8 +#ifdef __ARM_FEATURE_CRC32 +#ifdef __ARM_FP +#pragma GCC target ("arch=armv8-a+crc+simd") +#else #pragma GCC target ("arch=armv8-a+crc") +#endif __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) __crc32b (uint32_t __a, uint8_t __b) @@ -235,7 +239,7 @@ __crc32cd (uint32_t __a, uint64_t __b) } #endif -#endif /* __ARM_ARCH >= 8. */ +#endif /* __ARM_FEATURE_CRC32 */ #pragma GCC pop_options #ifdef __cplusplus diff --git a/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c new file mode 100644 index 0000000000000000000000000000000000000000..e6cbfc0b33e56e4275b96978ca1823d7682792fb --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c @@ -0,0 +1,14 @@ +/* Test that using an Armv8-a hard-float target doesn't + break CRC intrinsics. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-options "-mfloat-abi=hard -march=armv8-a+simd+crc" } */ + +#include <arm_acle.h> + +uint32_t +foo (uint32_t a, uint32_t b) +{ + return __crc32cw (a, b); +}