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i386: Increase Skylake SImode pseudo register store cost

Message ID CAMe9rOpED87P7Ri7fXJy4Ess-0sfcVThw__0TLm8=D8TJgshfg@mail.gmail.com
State New
Headers show
Series i386: Increase Skylake SImode pseudo register store cost | expand

Commit Message

H.J. Lu Sept. 18, 2019, 6:03 p.m. UTC 
On Skylake, SImode store cost isn't less than half cost of 128-bit vector
store.  This patch increases Skylake SImode pseudo register store cost to
make it the same as QImode and HImode.

gcc/

PR target/91446
* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
pseudo register store cost from 3 to 6 to make it the same as
QImode and HImode.

gcc/testsuite/

PR target/91446
* gcc.target/i386/pr91446.c: New test.

OK for trunk?

Thanks.

Comments

Uros Bizjak Sept. 18, 2019, 7:41 p.m. UTC | #1 
On Wed, Sep 18, 2019 at 8:04 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Skylake, SImode store cost isn't less than half cost of 128-bit vector
> store.  This patch increases Skylake SImode pseudo register store cost to
> make it the same as QImode and HImode.
>
> gcc/
>
> PR target/91446
> * config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
> pseudo register store cost from 3 to 6 to make it the same as
> QImode and HImode.
>
> gcc/testsuite/
>
> PR target/91446
> * gcc.target/i386/pr91446.c: New test.
>
> OK for trunk?

I assume these tunings are backed by some benchmark results. So, OK.

Thanks,
Uros.
diff mbox series

Patch

From 63c534a600ad412ad8224c8f01c58400780affe9 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Wed, 14 Aug 2019 14:01:15 -0700
Subject: [PATCH] i386: Increase Skylake SImode pseudo register store cost

On Skylake, SImode store cost isn't less than half cost of 128-bit vector
store.  This patch increases Skylake SImode pseudo register store cost to
make it the same as QImode and HImode.

gcc/

	PR target/91446
	* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
	pseudo register store cost from 3 to 6 to make it the same as
	QImode and HImode.

gcc/testsuite/

	PR target/91446
	* gcc.target/i386/pr91446.c: New test.
---
 gcc/config/i386/x86-tune-costs.h        |  2 +-
 gcc/testsuite/gcc.target/i386/pr91446.c | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr91446.c

diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h
index 00edece3eb68..42c9c2530c98 100644
--- a/gcc/config/i386/x86-tune-costs.h
+++ b/gcc/config/i386/x86-tune-costs.h
@@ -1638,7 +1638,7 @@  struct processor_costs skylake_cost = {
   {4, 4, 4},				/* cost of loading integer registers
 					   in QImode, HImode and SImode.
 					   Relative to reg-reg move (2).  */
-  {6, 6, 3},				/* cost of storing integer registers */
+  {6, 6, 6},				/* cost of storing integer registers */
   {6, 6, 6, 10, 20},			/* cost of loading SSE register
 					   in 32bit, 64bit, 128bit, 256bit and 512bit */
   {8, 8, 8, 12, 24},			/* cost of storing SSE register
diff --git a/gcc/testsuite/gcc.target/i386/pr91446.c b/gcc/testsuite/gcc.target/i386/pr91446.c
new file mode 100644
index 000000000000..f7c4bea616da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr91446.c
@@ -0,0 +1,24 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake -ftree-slp-vectorize -mtune-ctrl=^sse_typeless_stores" } */
+
+typedef struct
+{
+  unsigned long long width, height;
+  long long x, y;
+} info;
+
+extern void bar (info *);
+
+void
+foo (unsigned long long width, unsigned long long height,
+     long long x, long long y)
+{
+  info t;
+  t.width = width;
+  t.height = height;
+  t.x = x;
+  t.y = y;
+  bar (&t);
+}
+
+/* { dg-final { scan-assembler-times "vmovdqa\[^\n\r\]*xmm\[0-9\]" 2 } } */
-- 
2.20.1