| Message ID | 20190916213207.12792-4-vgupta@synopsys.com |
|---|---|
| State | New |
| Headers | show |
| Series | ARC MMU code updates | expand |
Hi Vineet, > -----Original Message----- > From: Vineet Gupta <vgupta@synopsys.com> > Sent: Monday, September 16, 2019 2:32 PM > To: linux-snps-arc@lists.infradead.org > Cc: Alexey Brodkin <abrodkin@synopsys.com>; Vineet Gupta <vgupta@synopsys.com> > Subject: [PATCH 3/6] ARC: mm: TLB Miss optim: avoid re-reading ECR > > For setting PTE Dirty bit, reuse the prior test for ST miss. > > No need to reload ECR and test for ST cause code as the prev > condition code is still valid (uncloberred) > > Signed-off-by: Vineet Gupta <vgupta@synopsys.com> > --- > arch/arc/mm/tlbex.S | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S > index 110c72536e8b..4c88148d4cd1 100644 > --- a/arch/arc/mm/tlbex.S > +++ b/arch/arc/mm/tlbex.S > @@ -380,9 +380,7 @@ ENTRY(EV_TLBMissD) > > ;---------------------------------------------------------------- > ; UPDATE_PTE: Let Linux VM know that page was accessed/dirty I'd suggest to put a BOLD comment here saying that we rely on previously set condition flag so that whoever reads or (even worse) modifies that or previous code keeps in mind that we shouldn't clobber a particular flag. > - lr r3, [ecr] > or r0, r0, _PAGE_ACCESSED ; Accessed bit always > - btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ? > or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well > st_s r0, [r1] ; Write back PTE -Alexey
On 9/16/19 4:36 PM, Alexey Brodkin wrote: >> >> ;---------------------------------------------------------------- >> ; UPDATE_PTE: Let Linux VM know that page was accessed/dirty > > I'd suggest to put a BOLD comment here saying that we rely on previously > set condition flag so that whoever reads or (even worse) modifies that or > previous code keeps in mind that we shouldn't clobber a particular flag. The flag setting code is only a few lines prior. It would be messy to annotate for flag checking instruction where the flags are clobbered. This is low level assembly code - not for faint hearted.
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index 110c72536e8b..4c88148d4cd1 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S @@ -380,9 +380,7 @@ ENTRY(EV_TLBMissD) ;---------------------------------------------------------------- ; UPDATE_PTE: Let Linux VM know that page was accessed/dirty - lr r3, [ecr] or r0, r0, _PAGE_ACCESSED ; Accessed bit always - btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ? or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well st_s r0, [r1] ; Write back PTE
For setting PTE Dirty bit, reuse the prior test for ST miss. No need to reload ECR and test for ST cause code as the prev condition code is still valid (uncloberred) Signed-off-by: Vineet Gupta <vgupta@synopsys.com> --- arch/arc/mm/tlbex.S | 2 -- 1 file changed, 2 deletions(-)