| Message ID | 1566525415-15487-1-git-send-email-hayashi.kunihiko@socionext.com |
|---|---|
| State | Accepted |
| Commit | 4ebeb4c559f3604169a54f3a318bdabcc6047320 |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [U-Boot] cmd: pci: Adjust display of digits for 64bit address and size | expand |
Hi Kunihiko, On Fri, Aug 23, 2019 at 9:57 AM Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote: > > The command "pci bar" and "pci region" display the address and size in > 16 characters including "0x", so the command can only display > 14 hexadecimal digits if the number of digits in the address and size is > less than 14. > > ID Base Size Width Type > ---------------------------------------------------------- > 0 0x00000020000000 0x00000000100000 64 MEM Prefetchable > 1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable I am not sure why the ID 0 line has 14 digits while the ID 1 line has 16 digits. Shouldn't both lines be either 14 digits so that's what you are fixing in this patch? > > The 64-bit address and size should be displayed in 18(= 16+2) digits, > so this patch adjusts them. > > Cc: Yehuda Yitschak <yehuday@marvell.com> > Cc: Simon Glass <sjg@chromium.org> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > cmd/pci.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/cmd/pci.c b/cmd/pci.c > index 2c5ee2a..0043471 100644 > --- a/cmd/pci.c > +++ b/cmd/pci.c > @@ -148,7 +148,7 @@ int pci_bar_show(struct udevice *dev) > > if ((!is_64 && size_low) || (is_64 && size)) { > size = ~size + 1; > - printf(" %d %#016llx %#016llx %d %s %s\n", > + printf(" %d %#018llx %#018llx %d %s %s\n", > bar_id, (unsigned long long)base, > (unsigned long long)size, is_64 ? 64 : 32, > is_io ? "I/O" : "MEM", > @@ -629,10 +629,10 @@ static void pci_show_regions(struct udevice *bus) > return; > } > > - printf("# %-16s %-16s %-16s %s\n", "Bus start", "Phys start", "Size", > + printf("# %-18s %-18s %-18s %s\n", "Bus start", "Phys start", "Size", > "Flags"); > for (i = 0, reg = hose->regions; i < hose->region_count; i++, reg++) { > - printf("%d %#016llx %#016llx %#016llx ", i, > + printf("%d %#018llx %#018llx %#018llx ", i, > (unsigned long long)reg->bus_start, > (unsigned long long)reg->phys_start, > (unsigned long long)reg->size); > -- Regards, Bin
Hi Bin, On Fri, 23 Aug 2019 11:43:55 +0800 <bmeng.cn@gmail.com> wrote: > Hi Kunihiko, > > On Fri, Aug 23, 2019 at 9:57 AM Kunihiko Hayashi > <hayashi.kunihiko@socionext.com> wrote: > > > > The command "pci bar" and "pci region" display the address and size in > > 16 characters including "0x", so the command can only display > > 14 hexadecimal digits if the number of digits in the address and size is > > less than 14. > > > > ID Base Size Width Type > > ---------------------------------------------------------- > > 0 0x00000020000000 0x00000000100000 64 MEM Prefetchable > > 1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable > > I am not sure why the ID 0 line has 14 digits while the ID 1 line has 16 digits. > > Shouldn't both lines be either 14 digits so that's what you are fixing > in this patch? The original format is "%#016llx". The base address of ID 1, "0xffff000080000000", is greater than 16 characters. So the result value is displayed as it is in 16 digits. However, the other values are less than 16 characters, and the values are zero padded. The padded values including "0x" are displayed in 16 characters. As a result, the values are displayed in 14 digits. After applying this patch, the values including "0x" are displayed in 18 characters, so the values are always displayed in 16 digits. Thank you, --- Best Regards, Kunihiko Hayashi
Hi Kunihiko, On Fri, Aug 23, 2019 at 1:40 PM Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote: > > Hi Bin, > > On Fri, 23 Aug 2019 11:43:55 +0800 <bmeng.cn@gmail.com> wrote: > > > Hi Kunihiko, > > > > On Fri, Aug 23, 2019 at 9:57 AM Kunihiko Hayashi > > <hayashi.kunihiko@socionext.com> wrote: > > > > > > The command "pci bar" and "pci region" display the address and size in > > > 16 characters including "0x", so the command can only display > > > 14 hexadecimal digits if the number of digits in the address and size is > > > less than 14. > > > > > > ID Base Size Width Type > > > ---------------------------------------------------------- > > > 0 0x00000020000000 0x00000000100000 64 MEM Prefetchable > > > 1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable > > > > I am not sure why the ID 0 line has 14 digits while the ID 1 line has 16 digits. > > > > Shouldn't both lines be either 14 digits so that's what you are fixing > > in this patch? > > The original format is "%#016llx". > The base address of ID 1, "0xffff000080000000", is greater than > 16 characters. So the result value is displayed as it is in 16 digits. > > However, the other values are less than 16 characters, and the values are > zero padded. The padded values including "0x" are displayed in 16 characters. > As a result, the values are displayed in 14 digits. > > After applying this patch, the values including "0x" are displayed in > 18 characters, so the values are always displayed in 16 digits. > Ah, I missed that. Thanks. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Regards, Bin
On Fri, Aug 23, 2019 at 10:56:55AM +0900, Kunihiko Hayashi wrote: > The command "pci bar" and "pci region" display the address and size in > 16 characters including "0x", so the command can only display > 14 hexadecimal digits if the number of digits in the address and size is > less than 14. > > ID Base Size Width Type > ---------------------------------------------------------- > 0 0x00000020000000 0x00000000100000 64 MEM Prefetchable > 1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable > > The 64-bit address and size should be displayed in 18(= 16+2) digits, > so this patch adjusts them. > > Cc: Yehuda Yitschak <yehuday@marvell.com> > Cc: Simon Glass <sjg@chromium.org> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Applied to u-boot/master, thanks!
diff --git a/cmd/pci.c b/cmd/pci.c index 2c5ee2a..0043471 100644 --- a/cmd/pci.c +++ b/cmd/pci.c @@ -148,7 +148,7 @@ int pci_bar_show(struct udevice *dev) if ((!is_64 && size_low) || (is_64 && size)) { size = ~size + 1; - printf(" %d %#016llx %#016llx %d %s %s\n", + printf(" %d %#018llx %#018llx %d %s %s\n", bar_id, (unsigned long long)base, (unsigned long long)size, is_64 ? 64 : 32, is_io ? "I/O" : "MEM", @@ -629,10 +629,10 @@ static void pci_show_regions(struct udevice *bus) return; } - printf("# %-16s %-16s %-16s %s\n", "Bus start", "Phys start", "Size", + printf("# %-18s %-18s %-18s %s\n", "Bus start", "Phys start", "Size", "Flags"); for (i = 0, reg = hose->regions; i < hose->region_count; i++, reg++) { - printf("%d %#016llx %#016llx %#016llx ", i, + printf("%d %#018llx %#018llx %#018llx ", i, (unsigned long long)reg->bus_start, (unsigned long long)reg->phys_start, (unsigned long long)reg->size);
The command "pci bar" and "pci region" display the address and size in 16 characters including "0x", so the command can only display 14 hexadecimal digits if the number of digits in the address and size is less than 14. ID Base Size Width Type ---------------------------------------------------------- 0 0x00000020000000 0x00000000100000 64 MEM Prefetchable 1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable The 64-bit address and size should be displayed in 18(= 16+2) digits, so this patch adjusts them. Cc: Yehuda Yitschak <yehuday@marvell.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- cmd/pci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)