Message ID | 1565308020-31952-4-git-send-email-skomatineni@nvidia.com |
---|---|
State | Superseded |
Headers | show |
Series | SC7 entry and exit support for Tegra210 | expand |
On Thu, Aug 08, 2019 at 04:46:42PM -0700, Sowjanya Komatineni wrote: > This patch implements context restore for clock divider. > > During system suspend, core power goes off and looses the settings > of the Tegra CAR controller registers. > > So on resume, clock dividers are restored back for normal operation. > > Reviewed-by: Dmitry Osipenko <digetx@gmail.com> > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > --- > drivers/clk/tegra/clk-divider.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) Acked-by: Thierry Reding <treding@nvidia.com>
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index e76731fb7d69..ca0de5f11f84 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -109,10 +109,21 @@ static int clk_frac_div_set_rate(struct clk_hw *hw, unsigned long rate, return 0; } +static void clk_divider_restore_context(struct clk_hw *hw) +{ + struct clk_hw *parent = clk_hw_get_parent(hw); + unsigned long parent_rate = clk_hw_get_rate(parent); + unsigned long rate = clk_hw_get_rate(hw); + + if (clk_frac_div_set_rate(hw, rate, parent_rate) < 0) + WARN_ON(1); +} + const struct clk_ops tegra_clk_frac_div_ops = { .recalc_rate = clk_frac_div_recalc_rate, .set_rate = clk_frac_div_set_rate, .round_rate = clk_frac_div_round_rate, + .restore_context = clk_divider_restore_context, }; struct clk *tegra_clk_register_divider(const char *name,