| Message ID | 1565308020-31952-2-git-send-email-skomatineni@nvidia.com |
|---|---|
| State | New |
| Headers | show |
| Series | SC7 entry and exit support for Tegra210 | expand |
09.08.2019 2:46, Sowjanya Komatineni пишет: > pmx_writel uses writel which inserts write barrier before the > register write rather. > > This patch has fix to replace writel with writel_relaxed followed > by a write barrier to ensure write operation before the barrier > is completed for successful pinctrl change. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > --- > drivers/pinctrl/tegra/pinctrl-tegra.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c > index e3a237534281..982ee634b3b1 100644 > --- a/drivers/pinctrl/tegra/pinctrl-tegra.c > +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c > @@ -32,7 +32,9 @@ static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg) > > static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg) > { > - writel(val, pmx->regs[bank] + reg); > + writel_relaxed(val, pmx->regs[bank] + reg); > + /* make sure pinmux register write completed */ > + wmb(); > } > > static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) > But this only ensures that CPU have sent the write to the APB BUS and not that the write actually taken into effect? I'm a bit paranoid when it comes to a cross-domain synchronization things. Any ways it looks better than it was before. Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
On Thu, Aug 08, 2019 at 04:46:40PM -0700, Sowjanya Komatineni wrote: > pmx_writel uses writel which inserts write barrier before the > register write rather. > > This patch has fix to replace writel with writel_relaxed followed > by a write barrier to ensure write operation before the barrier > is completed for successful pinctrl change. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > --- > drivers/pinctrl/tegra/pinctrl-tegra.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Acked-by: Thierry Reding <treding@nvidia.com>
On Fri, Aug 9, 2019 at 1:47 AM Sowjanya Komatineni <skomatineni@nvidia.com> wrote: > pmx_writel uses writel which inserts write barrier before the > register write rather. > > This patch has fix to replace writel with writel_relaxed followed > by a write barrier to ensure write operation before the barrier > is completed for successful pinctrl change. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Patch applied with the ACKs. Yours, Linus Walleij
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index e3a237534281..982ee634b3b1 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c @@ -32,7 +32,9 @@ static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg) static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg) { - writel(val, pmx->regs[bank] + reg); + writel_relaxed(val, pmx->regs[bank] + reg); + /* make sure pinmux register write completed */ + wmb(); } static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
pmx_writel uses writel which inserts write barrier before the register write rather. This patch has fix to replace writel with writel_relaxed followed by a write barrier to ensure write operation before the barrier is completed for successful pinctrl change. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- drivers/pinctrl/tegra/pinctrl-tegra.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)