| Message ID | 20190702223248.31934-4-martin.blumenstingl@googlemail.com |
|---|---|
| State | New |
| Headers | show |
| Series | gpio: stp-xway: small cleanups and improvements | expand |
On Wed, Jul 3, 2019 at 12:33 AM Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > Use the xway_stp_{r,w}32 helpers in xway_stp_w32_mask instead of relying > on ltq_{r,w}32 from the architecture specific <lantiq_soc.h>. > This will allow the driver to be compile-tested on all architectures > that support MMIO. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Patch applied. Yours, Linus Walleij
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index b31e08f84681..9e23a5ae8108 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c @@ -15,8 +15,6 @@ #include <linux/clk.h> #include <linux/err.h> -#include <lantiq_soc.h> - /* * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a * peripheral controller used to drive external shift register cascades. At most @@ -71,8 +69,7 @@ #define xway_stp_r32(m, reg) __raw_readl(m + reg) #define xway_stp_w32(m, val, reg) __raw_writel(val, m + reg) #define xway_stp_w32_mask(m, clear, set, reg) \ - ltq_w32((ltq_r32(m + reg) & ~(clear)) | (set), \ - m + reg) + xway_stp_w32(m, (xway_stp_r32(m, reg) & ~(clear)) | (set), reg) struct xway_stp { struct gpio_chip gc;
Use the xway_stp_{r,w}32 helpers in xway_stp_w32_mask instead of relying on ltq_{r,w}32 from the architecture specific <lantiq_soc.h>. This will allow the driver to be compile-tested on all architectures that support MMIO. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- drivers/gpio/gpio-stp-xway.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)