| Message ID | 20190628200825.31049-7-cclaudio@linux.ibm.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | kvmppc: Paravirtualize KVM to support ultravisor | expand |
On 29/06/2019 06:08, Claudio Carvalho wrote: > When the ultravisor firmware is available, it takes control over the > LDBAR register. In this case, thread-imc updates and save/restore > operations on the LDBAR register are handled by ultravisor. What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9 Processor" do not tell. > > Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com> > Reviewed-by: Ram Pai <linuxram@us.ibm.com> > Reviewed-by: Ryan Grimm <grimm@linux.ibm.com> > Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> > Acked-by: Paul Mackerras <paulus@ozlabs.org> > --- > arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 ++ > arch/powerpc/platforms/powernv/idle.c | 6 ++++-- > arch/powerpc/platforms/powernv/opal-imc.c | 4 ++++ > 3 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > index f9b2620fbecd..cffb365d9d02 100644 > --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S > +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION > mtspr SPRN_RPR, r0 > ld r0, KVM_SPLIT_PMMAR(r6) > mtspr SPRN_PMMAR, r0 > +BEGIN_FW_FTR_SECTION_NESTED(70) > ld r0, KVM_SPLIT_LDBAR(r6) > mtspr SPRN_LDBAR, r0 > +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) > isync > FTR_SECTION_ELSE > /* On P9 we use the split_info for coordinating LPCR changes */ > diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c > index 77f2e0a4ee37..5593a2d55959 100644 > --- a/arch/powerpc/platforms/powernv/idle.c > +++ b/arch/powerpc/platforms/powernv/idle.c > @@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on) > sprs.ptcr = mfspr(SPRN_PTCR); > sprs.rpr = mfspr(SPRN_RPR); > sprs.tscr = mfspr(SPRN_TSCR); > - sprs.ldbar = mfspr(SPRN_LDBAR); > + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + sprs.ldbar = mfspr(SPRN_LDBAR); > > sprs_saved = true; > > @@ -762,7 +763,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on) > mtspr(SPRN_PTCR, sprs.ptcr); > mtspr(SPRN_RPR, sprs.rpr); > mtspr(SPRN_TSCR, sprs.tscr); > - mtspr(SPRN_LDBAR, sprs.ldbar); > + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + mtspr(SPRN_LDBAR, sprs.ldbar); > > if (pls >= pnv_first_tb_loss_level) { > /* TB loss */ > diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c > index 1b6932890a73..5fe2d4526cbc 100644 > --- a/arch/powerpc/platforms/powernv/opal-imc.c > +++ b/arch/powerpc/platforms/powernv/opal-imc.c > @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev) > bool core_imc_reg = false, thread_imc_reg = false; > u32 type; > > + /* Disable IMC devices, when Ultravisor is enabled. */ > + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + return -EACCES; > + > /* > * Check whether this is kdump kernel. If yes, force the engines to > * stop and return. >
On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote: > > On 29/06/2019 06:08, Claudio Carvalho wrote: >> When the ultravisor firmware is available, it takes control over the >> LDBAR register. In this case, thread-imc updates and save/restore >> operations on the LDBAR register are handled by ultravisor. > What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9 > Processor" do not tell. LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter data into memory. LDBAR contains memory address along with few other configuration bits (it is populated by the thread-imc pmu driver). It is populated and enabled only when any of the thread imc pmu events are monitored. Maddy > > >> Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com> >> Reviewed-by: Ram Pai <linuxram@us.ibm.com> >> Reviewed-by: Ryan Grimm <grimm@linux.ibm.com> >> Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> >> Acked-by: Paul Mackerras <paulus@ozlabs.org> >> --- >> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 ++ >> arch/powerpc/platforms/powernv/idle.c | 6 ++++-- >> arch/powerpc/platforms/powernv/opal-imc.c | 4 ++++ >> 3 files changed, 10 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S >> index f9b2620fbecd..cffb365d9d02 100644 >> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S >> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S >> @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION >> mtspr SPRN_RPR, r0 >> ld r0, KVM_SPLIT_PMMAR(r6) >> mtspr SPRN_PMMAR, r0 >> +BEGIN_FW_FTR_SECTION_NESTED(70) >> ld r0, KVM_SPLIT_LDBAR(r6) >> mtspr SPRN_LDBAR, r0 >> +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) >> isync >> FTR_SECTION_ELSE >> /* On P9 we use the split_info for coordinating LPCR changes */ >> diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c >> index 77f2e0a4ee37..5593a2d55959 100644 >> --- a/arch/powerpc/platforms/powernv/idle.c >> +++ b/arch/powerpc/platforms/powernv/idle.c >> @@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on) >> sprs.ptcr = mfspr(SPRN_PTCR); >> sprs.rpr = mfspr(SPRN_RPR); >> sprs.tscr = mfspr(SPRN_TSCR); >> - sprs.ldbar = mfspr(SPRN_LDBAR); >> + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >> + sprs.ldbar = mfspr(SPRN_LDBAR); >> >> sprs_saved = true; >> >> @@ -762,7 +763,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on) >> mtspr(SPRN_PTCR, sprs.ptcr); >> mtspr(SPRN_RPR, sprs.rpr); >> mtspr(SPRN_TSCR, sprs.tscr); >> - mtspr(SPRN_LDBAR, sprs.ldbar); >> + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >> + mtspr(SPRN_LDBAR, sprs.ldbar); >> >> if (pls >= pnv_first_tb_loss_level) { >> /* TB loss */ >> diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c >> index 1b6932890a73..5fe2d4526cbc 100644 >> --- a/arch/powerpc/platforms/powernv/opal-imc.c >> +++ b/arch/powerpc/platforms/powernv/opal-imc.c >> @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev) >> bool core_imc_reg = false, thread_imc_reg = false; >> u32 type; >> >> + /* Disable IMC devices, when Ultravisor is enabled. */ >> + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >> + return -EACCES; >> + >> /* >> * Check whether this is kdump kernel. If yes, force the engines to >> * stop and return. >>
On 01/07/2019 16:17, maddy wrote: > > On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote: >> >> On 29/06/2019 06:08, Claudio Carvalho wrote: >>> When the ultravisor firmware is available, it takes control over the >>> LDBAR register. In this case, thread-imc updates and save/restore >>> operations on the LDBAR register are handled by ultravisor. >> What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9 >> Processor" do not tell. > LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter > data into memory. > LDBAR contains memory address along with few other configuration bits > (it is populated > by the thread-imc pmu driver). It is populated and enabled only when any > of the thread > imc pmu events are monitored. I was actually looking for a spec for this register, what is the document name? > > Maddy >> >> >>> Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com> >>> Reviewed-by: Ram Pai <linuxram@us.ibm.com> >>> Reviewed-by: Ryan Grimm <grimm@linux.ibm.com> >>> Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> >>> Acked-by: Paul Mackerras <paulus@ozlabs.org> >>> --- >>> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 ++ >>> arch/powerpc/platforms/powernv/idle.c | 6 ++++-- >>> arch/powerpc/platforms/powernv/opal-imc.c | 4 ++++ >>> 3 files changed, 10 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S >>> b/arch/powerpc/kvm/book3s_hv_rmhandlers.S >>> index f9b2620fbecd..cffb365d9d02 100644 >>> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S >>> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S >>> @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION >>> mtspr SPRN_RPR, r0 >>> ld r0, KVM_SPLIT_PMMAR(r6) >>> mtspr SPRN_PMMAR, r0 >>> +BEGIN_FW_FTR_SECTION_NESTED(70) >>> ld r0, KVM_SPLIT_LDBAR(r6) >>> mtspr SPRN_LDBAR, r0 >>> +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) >>> isync >>> FTR_SECTION_ELSE >>> /* On P9 we use the split_info for coordinating LPCR changes */ >>> diff --git a/arch/powerpc/platforms/powernv/idle.c >>> b/arch/powerpc/platforms/powernv/idle.c >>> index 77f2e0a4ee37..5593a2d55959 100644 >>> --- a/arch/powerpc/platforms/powernv/idle.c >>> +++ b/arch/powerpc/platforms/powernv/idle.c >>> @@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned >>> long psscr, bool mmu_on) >>> sprs.ptcr = mfspr(SPRN_PTCR); >>> sprs.rpr = mfspr(SPRN_RPR); >>> sprs.tscr = mfspr(SPRN_TSCR); >>> - sprs.ldbar = mfspr(SPRN_LDBAR); >>> + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >>> + sprs.ldbar = mfspr(SPRN_LDBAR); >>> sprs_saved = true; >>> @@ -762,7 +763,8 @@ static unsigned long power9_idle_stop(unsigned >>> long psscr, bool mmu_on) >>> mtspr(SPRN_PTCR, sprs.ptcr); >>> mtspr(SPRN_RPR, sprs.rpr); >>> mtspr(SPRN_TSCR, sprs.tscr); >>> - mtspr(SPRN_LDBAR, sprs.ldbar); >>> + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >>> + mtspr(SPRN_LDBAR, sprs.ldbar); >>> if (pls >= pnv_first_tb_loss_level) { >>> /* TB loss */ >>> diff --git a/arch/powerpc/platforms/powernv/opal-imc.c >>> b/arch/powerpc/platforms/powernv/opal-imc.c >>> index 1b6932890a73..5fe2d4526cbc 100644 >>> --- a/arch/powerpc/platforms/powernv/opal-imc.c >>> +++ b/arch/powerpc/platforms/powernv/opal-imc.c >>> @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct >>> platform_device *pdev) >>> bool core_imc_reg = false, thread_imc_reg = false; >>> u32 type; >>> + /* Disable IMC devices, when Ultravisor is enabled. */ >>> + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >>> + return -EACCES; >>> + >>> /* >>> * Check whether this is kdump kernel. If yes, force the >>> engines to >>> * stop and return. >>> >
On Mon, Jul 01, 2019 at 04:30:55PM +1000, Alexey Kardashevskiy wrote: > > > On 01/07/2019 16:17, maddy wrote: > > > > On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote: > >> > >> On 29/06/2019 06:08, Claudio Carvalho wrote: > >>> When the ultravisor firmware is available, it takes control over the > >>> LDBAR register. In this case, thread-imc updates and save/restore > >>> operations on the LDBAR register are handled by ultravisor. > >> What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9 > >> Processor" do not tell. > > LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter > > data into memory. > > LDBAR contains memory address along with few other configuration bits > > (it is populated > > by the thread-imc pmu driver). It is populated and enabled only when any > > of the thread > > imc pmu events are monitored. > > > I was actually looking for a spec for this register, what is the > document name? Its not a architected register. Its documented in the Power9 workbook. RP
On 2019-06-28 15:08, Claudio Carvalho wrote: > When the ultravisor firmware is available, it takes control over the > LDBAR register. In this case, thread-imc updates and save/restore > operations on the LDBAR register are handled by ultravisor. > > Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com> > Reviewed-by: Ram Pai <linuxram@us.ibm.com> > Reviewed-by: Ryan Grimm <grimm@linux.ibm.com> > Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> > Acked-by: Paul Mackerras <paulus@ozlabs.org> Reviewed-by: Janani Janakiraman <janani@linux.ibm.com> > --- > arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 ++ > arch/powerpc/platforms/powernv/idle.c | 6 ++++-- > arch/powerpc/platforms/powernv/opal-imc.c | 4 ++++ > 3 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S > b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > index f9b2620fbecd..cffb365d9d02 100644 > --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S > +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION > mtspr SPRN_RPR, r0 > ld r0, KVM_SPLIT_PMMAR(r6) > mtspr SPRN_PMMAR, r0 > +BEGIN_FW_FTR_SECTION_NESTED(70) > ld r0, KVM_SPLIT_LDBAR(r6) > mtspr SPRN_LDBAR, r0 > +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) > isync > FTR_SECTION_ELSE > /* On P9 we use the split_info for coordinating LPCR changes */ > diff --git a/arch/powerpc/platforms/powernv/idle.c > b/arch/powerpc/platforms/powernv/idle.c > index 77f2e0a4ee37..5593a2d55959 100644 > --- a/arch/powerpc/platforms/powernv/idle.c > +++ b/arch/powerpc/platforms/powernv/idle.c > @@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned > long psscr, bool mmu_on) > sprs.ptcr = mfspr(SPRN_PTCR); > sprs.rpr = mfspr(SPRN_RPR); > sprs.tscr = mfspr(SPRN_TSCR); > - sprs.ldbar = mfspr(SPRN_LDBAR); > + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + sprs.ldbar = mfspr(SPRN_LDBAR); > > sprs_saved = true; > > @@ -762,7 +763,8 @@ static unsigned long power9_idle_stop(unsigned > long psscr, bool mmu_on) > mtspr(SPRN_PTCR, sprs.ptcr); > mtspr(SPRN_RPR, sprs.rpr); > mtspr(SPRN_TSCR, sprs.tscr); > - mtspr(SPRN_LDBAR, sprs.ldbar); > + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + mtspr(SPRN_LDBAR, sprs.ldbar); > > if (pls >= pnv_first_tb_loss_level) { > /* TB loss */ > diff --git a/arch/powerpc/platforms/powernv/opal-imc.c > b/arch/powerpc/platforms/powernv/opal-imc.c > index 1b6932890a73..5fe2d4526cbc 100644 > --- a/arch/powerpc/platforms/powernv/opal-imc.c > +++ b/arch/powerpc/platforms/powernv/opal-imc.c > @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct > platform_device *pdev) > bool core_imc_reg = false, thread_imc_reg = false; > u32 type; > > + /* Disable IMC devices, when Ultravisor is enabled. */ > + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + return -EACCES; > + > /* > * Check whether this is kdump kernel. If yes, force the engines to > * stop and return.
Claudio Carvalho <cclaudio@linux.ibm.com> writes: > When the ultravisor firmware is available, it takes control over the > LDBAR register. In this case, thread-imc updates and save/restore > operations on the LDBAR register are handled by ultravisor. Please roll up the replies to Alexey's question about LDBAR into the change log. > diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > index f9b2620fbecd..cffb365d9d02 100644 > --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S > +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION > mtspr SPRN_RPR, r0 > ld r0, KVM_SPLIT_PMMAR(r6) > mtspr SPRN_PMMAR, r0 > +BEGIN_FW_FTR_SECTION_NESTED(70) > ld r0, KVM_SPLIT_LDBAR(r6) > mtspr SPRN_LDBAR, r0 > +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) That's in Power8 code isn't it? Which will never have an ultravisor. > diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c > index 1b6932890a73..5fe2d4526cbc 100644 > --- a/arch/powerpc/platforms/powernv/opal-imc.c > +++ b/arch/powerpc/platforms/powernv/opal-imc.c > @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev) > bool core_imc_reg = false, thread_imc_reg = false; > u32 type; > > + /* Disable IMC devices, when Ultravisor is enabled. */ > + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) > + return -EACCES; I don't mind taking this change. But at the same time should the IMC stuff just be omitted from the device tree when we're in ultravisor mode? cheers
On 7/1/19 3:46 AM, Ram Pai wrote: > On Mon, Jul 01, 2019 at 04:30:55PM +1000, Alexey Kardashevskiy wrote: >> >> On 01/07/2019 16:17, maddy wrote: >>> On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote: >>>> On 29/06/2019 06:08, Claudio Carvalho wrote: >>>>> When the ultravisor firmware is available, it takes control over the >>>>> LDBAR register. In this case, thread-imc updates and save/restore >>>>> operations on the LDBAR register are handled by ultravisor. >>>> What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9 >>>> Processor" do not tell. >>> LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter >>> data into memory. >>> LDBAR contains memory address along with few other configuration bits >>> (it is populated >>> by the thread-imc pmu driver). It is populated and enabled only when any >>> of the thread >>> imc pmu events are monitored. >> >> I was actually looking for a spec for this register, what is the >> document name? > Its not a architected register. Its documented in the Power9 > workbook. I also found some information about the LDBAR in arch/powerpc/perf/imc-pmu.c Claudio > > RP >
On 7/11/19 9:57 AM, Michael Ellerman wrote: > Claudio Carvalho <cclaudio@linux.ibm.com> writes: >> When the ultravisor firmware is available, it takes control over the >> LDBAR register. In this case, thread-imc updates and save/restore >> operations on the LDBAR register are handled by ultravisor. > Please roll up the replies to Alexey's question about LDBAR into the > change log. > >> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S >> index f9b2620fbecd..cffb365d9d02 100644 >> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S >> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S >> @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION >> mtspr SPRN_RPR, r0 >> ld r0, KVM_SPLIT_PMMAR(r6) >> mtspr SPRN_PMMAR, r0 >> +BEGIN_FW_FTR_SECTION_NESTED(70) >> ld r0, KVM_SPLIT_LDBAR(r6) >> mtspr SPRN_LDBAR, r0 >> +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) > That's in Power8 code isn't it? Which will never have an ultravisor. IIUC, it might be executed in Power9 as well, but I can double check that. > >> diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c >> index 1b6932890a73..5fe2d4526cbc 100644 >> --- a/arch/powerpc/platforms/powernv/opal-imc.c >> +++ b/arch/powerpc/platforms/powernv/opal-imc.c >> @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev) >> bool core_imc_reg = false, thread_imc_reg = false; >> u32 type; >> >> + /* Disable IMC devices, when Ultravisor is enabled. */ >> + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) >> + return -EACCES; > I don't mind taking this change. But at the same time should the IMC > stuff just be omitted from the device tree when we're in ultravisor mode? Yes. Maddy said that he will patch skiboot to remove the IMC nodes if ultravisor is present. I added this check just to protect the kernel in case skiboot is not in the right level for some reason. Thanks, Claudio > > cheers >
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index f9b2620fbecd..cffb365d9d02 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -375,8 +375,10 @@ BEGIN_FTR_SECTION mtspr SPRN_RPR, r0 ld r0, KVM_SPLIT_PMMAR(r6) mtspr SPRN_PMMAR, r0 +BEGIN_FW_FTR_SECTION_NESTED(70) ld r0, KVM_SPLIT_LDBAR(r6) mtspr SPRN_LDBAR, r0 +END_FW_FTR_SECTION_NESTED(FW_FEATURE_ULTRAVISOR, 0, 70) isync FTR_SECTION_ELSE /* On P9 we use the split_info for coordinating LPCR changes */ diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index 77f2e0a4ee37..5593a2d55959 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -679,7 +679,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on) sprs.ptcr = mfspr(SPRN_PTCR); sprs.rpr = mfspr(SPRN_RPR); sprs.tscr = mfspr(SPRN_TSCR); - sprs.ldbar = mfspr(SPRN_LDBAR); + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) + sprs.ldbar = mfspr(SPRN_LDBAR); sprs_saved = true; @@ -762,7 +763,8 @@ static unsigned long power9_idle_stop(unsigned long psscr, bool mmu_on) mtspr(SPRN_PTCR, sprs.ptcr); mtspr(SPRN_RPR, sprs.rpr); mtspr(SPRN_TSCR, sprs.tscr); - mtspr(SPRN_LDBAR, sprs.ldbar); + if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) + mtspr(SPRN_LDBAR, sprs.ldbar); if (pls >= pnv_first_tb_loss_level) { /* TB loss */ diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c index 1b6932890a73..5fe2d4526cbc 100644 --- a/arch/powerpc/platforms/powernv/opal-imc.c +++ b/arch/powerpc/platforms/powernv/opal-imc.c @@ -254,6 +254,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev) bool core_imc_reg = false, thread_imc_reg = false; u32 type; + /* Disable IMC devices, when Ultravisor is enabled. */ + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) + return -EACCES; + /* * Check whether this is kdump kernel. If yes, force the engines to * stop and return.