Message ID | 20190618140358.13148-2-digetx@gmail.com |
---|---|
State | Deferred |
Headers | show |
Series | Few more cleanups for tegra-timer | expand |
On Tue, Jun 18, 2019 at 05:03:51PM +0300, Dmitry Osipenko wrote: > The clocksource rate is initialized only for the first per-CPU clocksource > and then that rate shall be replicated for the rest of clocksource's > because they are initialized manually in the code. > > Fixes: 3be2a85a0b61 ("clocksource/drivers/tegra: Support per-CPU timers on all Tegra's") > Acked-by: Jon Hunter <jonathanh@nvidia.com> > Tested-by: Jon Hunter <jonathanh@nvidia.com> > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > drivers/clocksource/timer-tegra.c | 2 ++ > 1 file changed, 2 insertions(+) Acked-by: Thierry Reding <treding@nvidia.com>
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c index 1cc5847a1030..501071f09fa8 100644 --- a/drivers/clocksource/timer-tegra.c +++ b/drivers/clocksource/timer-tegra.c @@ -277,6 +277,8 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, */ if (tegra20) cpu_to->of_clk.rate = 1000000; + else + cpu_to->of_clk.rate = timer_of_rate(to); cpu_to = per_cpu_ptr(&tegra_to, cpu); cpu_to->of_base.base = timer_reg_base + base;