| Message ID | 1560843991-24123-13-git-send-email-skomatineni@nvidia.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | SC7 entry and exit support for Tegra210 | expand |
On 18/06/2019 08:46, Sowjanya Komatineni wrote: > This patch allows to create separate irq_set_wake and irq_set_type > implementations for different tegra designs PMC that has different > wake models which require difference wake registers and different > programming sequence. > > AOWAKE model support is available for Tegra186 and Tegra194 only > and it resides within PMC and supports tiered wake architecture. > > Tegra210 and prior tegra designs uses PMC directly to receive wake > events and coordinate the wake sequence. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > --- > drivers/soc/tegra/pmc.c | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c > index edd4fe06810f..e87f29a35fcf 100644 > --- a/drivers/soc/tegra/pmc.c > +++ b/drivers/soc/tegra/pmc.c > @@ -226,6 +226,8 @@ struct tegra_pmc_soc { > void (*setup_irq_polarity)(struct tegra_pmc *pmc, > struct device_node *np, > bool invert); > + int (*irq_set_wake)(struct irq_data *data, unsigned int on); > + int (*irq_set_type)(struct irq_data *data, unsigned int type); > > const char * const *reset_sources; > unsigned int num_reset_sources; > @@ -1919,7 +1921,7 @@ static const struct irq_domain_ops tegra_pmc_irq_domain_ops = { > .alloc = tegra_pmc_irq_alloc, > }; > > -static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on) > +static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on) > { > struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); > unsigned int offset, bit; > @@ -1951,7 +1953,7 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on) > return 0; > } > > -static int tegra_pmc_irq_set_type(struct irq_data *data, unsigned int type) > +static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type) > { > struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); > u32 value; > @@ -2005,8 +2007,10 @@ static int tegra_pmc_irq_init(struct tegra_pmc *pmc) > pmc->irq.irq_unmask = irq_chip_unmask_parent; > pmc->irq.irq_eoi = irq_chip_eoi_parent; > pmc->irq.irq_set_affinity = irq_chip_set_affinity_parent; > - pmc->irq.irq_set_type = tegra_pmc_irq_set_type; > - pmc->irq.irq_set_wake = tegra_pmc_irq_set_wake; > + if (pmc->soc->irq_set_type) > + pmc->irq.irq_set_type = pmc->soc->irq_set_type; > + if (pmc->soc->irq_set_wake) > + pmc->irq.irq_set_wake = pmc->soc->irq_set_wake; Two cases: either the value is non NULL, and we assign it, or it is NULL, and we leave it to what it was, presumably NULL. I guess you can drop the both ifs. > > pmc->domain = irq_domain_add_hierarchy(parent, 0, 96, pmc->dev->of_node, > &tegra_pmc_irq_domain_ops, pmc); > @@ -2679,6 +2683,8 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = { > .regs = &tegra186_pmc_regs, > .init = NULL, > .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, > + .irq_set_wake = tegra186_pmc_irq_set_wake, > + .irq_set_type = tegra186_pmc_irq_set_type, > .reset_sources = tegra186_reset_sources, > .num_reset_sources = ARRAY_SIZE(tegra186_reset_sources), > .reset_levels = tegra186_reset_levels, > Thanks, M.
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index edd4fe06810f..e87f29a35fcf 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -226,6 +226,8 @@ struct tegra_pmc_soc { void (*setup_irq_polarity)(struct tegra_pmc *pmc, struct device_node *np, bool invert); + int (*irq_set_wake)(struct irq_data *data, unsigned int on); + int (*irq_set_type)(struct irq_data *data, unsigned int type); const char * const *reset_sources; unsigned int num_reset_sources; @@ -1919,7 +1921,7 @@ static const struct irq_domain_ops tegra_pmc_irq_domain_ops = { .alloc = tegra_pmc_irq_alloc, }; -static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on) +static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on) { struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); unsigned int offset, bit; @@ -1951,7 +1953,7 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on) return 0; } -static int tegra_pmc_irq_set_type(struct irq_data *data, unsigned int type) +static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type) { struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); u32 value; @@ -2005,8 +2007,10 @@ static int tegra_pmc_irq_init(struct tegra_pmc *pmc) pmc->irq.irq_unmask = irq_chip_unmask_parent; pmc->irq.irq_eoi = irq_chip_eoi_parent; pmc->irq.irq_set_affinity = irq_chip_set_affinity_parent; - pmc->irq.irq_set_type = tegra_pmc_irq_set_type; - pmc->irq.irq_set_wake = tegra_pmc_irq_set_wake; + if (pmc->soc->irq_set_type) + pmc->irq.irq_set_type = pmc->soc->irq_set_type; + if (pmc->soc->irq_set_wake) + pmc->irq.irq_set_wake = pmc->soc->irq_set_wake; pmc->domain = irq_domain_add_hierarchy(parent, 0, 96, pmc->dev->of_node, &tegra_pmc_irq_domain_ops, pmc); @@ -2679,6 +2683,8 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = { .regs = &tegra186_pmc_regs, .init = NULL, .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, + .irq_set_wake = tegra186_pmc_irq_set_wake, + .irq_set_type = tegra186_pmc_irq_set_type, .reset_sources = tegra186_reset_sources, .num_reset_sources = ARRAY_SIZE(tegra186_reset_sources), .reset_levels = tegra186_reset_levels,
This patch allows to create separate irq_set_wake and irq_set_type implementations for different tegra designs PMC that has different wake models which require difference wake registers and different programming sequence. AOWAKE model support is available for Tegra186 and Tegra194 only and it resides within PMC and supports tiered wake architecture. Tegra210 and prior tegra designs uses PMC directly to receive wake events and coordinate the wake sequence. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- drivers/soc/tegra/pmc.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)