Message ID | 20190526043751.12729-1-vidyas@nvidia.com |
---|---|
Headers | show |
Series | Add Tegra194 PCIe support | expand |
On Sun, May 26, 2019 at 10:07:41AM +0530, Vidya Sagar wrote: > Add extended configuration space capability search API using struct dw_pcie * > pointer > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > --- > Changes since [v7]: > * Changed data types of return and arguments to be inline with data being returned > and passed. > > Changes since [v6]: > * None > > Changes since [v5]: > * None > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * None > > Changes since [v1]: > * This is a new patch in v2 series > > drivers/pci/controller/dwc/pcie-designware.c | 41 ++++++++++++++++++++ > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 42 insertions(+) Acked-by: Thierry Reding <treding@nvidia.com>
On Sun, May 26, 2019 at 10:07:50AM +0530, Vidya Sagar wrote: > Add support for Synopsys DesignWare core IP based PCIe host controller > present in Tegra194 SoC. > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > Changes since [v7]: > * Addressed review comments from Thierry > > Changes since [v6]: > * Removed code around "nvidia,disable-aspm-states" DT property > * Refactored code to remove code duplication > > Changes since [v5]: > * Addressed review comments from Thierry > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * Changed 'nvidia,init-speed' to 'nvidia,init-link-speed' > * Changed 'nvidia,pex-wake' to 'nvidia,wake-gpios' > * Removed .runtime_suspend() & .runtime_resume() implementations > > Changes since [v1]: > * Made CONFIG_PCIE_TEGRA194 as 'm' by default from its previous 'y' state > * Modified code as per changes made to DT documentation > * Refactored code to address Bjorn & Thierry's review comments > * Added goto to avoid recursion in tegra_pcie_dw_host_init() API > * Merged .scan_bus() of dw_pcie_host_ops implementation to tegra_pcie_dw_host_init() API > > drivers/pci/controller/dwc/Kconfig | 10 + > drivers/pci/controller/dwc/Makefile | 1 + > drivers/pci/controller/dwc/pcie-tegra194.c | 1621 ++++++++++++++++++++ > 3 files changed, 1632 insertions(+) > create mode 100644 drivers/pci/controller/dwc/pcie-tegra194.c Acked-by: Thierry Reding <treding@nvidia.com>
26.05.2019 7:37, Vidya Sagar пишет: > Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface > with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module. > For each PCIe lane of a controller, there is a P2U unit instantiated at > hardware level. This driver provides support for the programming required > for each P2U that is going to be used for a PCIe controller. > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > Changes since [v7]: > * Changed P2U driver file name from pcie-p2u-tegra194.c to phy-tegra194-p2u.c > > Changes since [v6]: > * None > > Changes since [v5]: > * Addressed review comments from Thierry > > Changes since [v4]: > * None > > Changes since [v3]: > * Rebased on top of linux-next top of the tree > > Changes since [v2]: > * Replaced spaces with tabs in Kconfig file > * Sorted header file inclusion alphabetically > > Changes since [v1]: > * Added COMPILE_TEST in Kconfig > * Removed empty phy_ops implementations > * Modified code according to DT documentation file modifications > > drivers/phy/tegra/Kconfig | 7 ++ > drivers/phy/tegra/Makefile | 1 + > drivers/phy/tegra/phy-tegra194-p2u.c | 109 +++++++++++++++++++++++++++ > 3 files changed, 117 insertions(+) > create mode 100644 drivers/phy/tegra/phy-tegra194-p2u.c > > diff --git a/drivers/phy/tegra/Kconfig b/drivers/phy/tegra/Kconfig > index a3b1de953fb7..c56fc8452e03 100644 > --- a/drivers/phy/tegra/Kconfig > +++ b/drivers/phy/tegra/Kconfig > @@ -6,3 +6,10 @@ config PHY_TEGRA_XUSB > > To compile this driver as a module, choose M here: the module will > be called phy-tegra-xusb. > + > +config PHY_TEGRA194_P2U > + tristate "NVIDIA Tegra194 PIPE2UPHY PHY driver" > + depends on ARCH_TEGRA || COMPILE_TEST ARCH_TEGRA is a bit too much, ARCH_TEGRA_194_SOC should fit better here.
26.05.2019 7:37, Vidya Sagar пишет: > Add support for Synopsys DesignWare core IP based PCIe host controller > present in Tegra194 SoC. > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > Changes since [v7]: > * Addressed review comments from Thierry > > Changes since [v6]: > * Removed code around "nvidia,disable-aspm-states" DT property > * Refactored code to remove code duplication > > Changes since [v5]: > * Addressed review comments from Thierry > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * Changed 'nvidia,init-speed' to 'nvidia,init-link-speed' > * Changed 'nvidia,pex-wake' to 'nvidia,wake-gpios' > * Removed .runtime_suspend() & .runtime_resume() implementations > > Changes since [v1]: > * Made CONFIG_PCIE_TEGRA194 as 'm' by default from its previous 'y' state > * Modified code as per changes made to DT documentation > * Refactored code to address Bjorn & Thierry's review comments > * Added goto to avoid recursion in tegra_pcie_dw_host_init() API > * Merged .scan_bus() of dw_pcie_host_ops implementation to tegra_pcie_dw_host_init() API > > drivers/pci/controller/dwc/Kconfig | 10 + > drivers/pci/controller/dwc/Makefile | 1 + > drivers/pci/controller/dwc/pcie-tegra194.c | 1621 ++++++++++++++++++++ > 3 files changed, 1632 insertions(+) > create mode 100644 drivers/pci/controller/dwc/pcie-tegra194.c > > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig > index a6ce1ee51b4c..884112afc11b 100644 > --- a/drivers/pci/controller/dwc/Kconfig > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -220,6 +220,16 @@ config PCI_MESON > and therefore the driver re-uses the DesignWare core functions to > implement the driver. > > +config PCIE_TEGRA194 > + tristate "NVIDIA Tegra194 (and later) PCIe controller" > + depends on (TEGRA_BPMP && ARCH_TEGRA) || COMPILE_TEST TEGRA_BPMP will be enough here as it depends on other relevant options. Hence I mean: depends on TEGRA_BPMP || COMPILE_TEST > + depends on PCI_MSI_IRQ_DOMAIN You probably want to s/depends on/select/ PCI_MSI_IRQ_DOMAIN, don't you?
06.06.2019 19:35, Dmitry Osipenko пишет: > 26.05.2019 7:37, Vidya Sagar пишет: >> Add support for Synopsys DesignWare core IP based PCIe host controller >> present in Tegra194 SoC. >> >> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >> --- >> Changes since [v7]: >> * Addressed review comments from Thierry >> >> Changes since [v6]: >> * Removed code around "nvidia,disable-aspm-states" DT property >> * Refactored code to remove code duplication >> >> Changes since [v5]: >> * Addressed review comments from Thierry >> >> Changes since [v4]: >> * None >> >> Changes since [v3]: >> * None >> >> Changes since [v2]: >> * Changed 'nvidia,init-speed' to 'nvidia,init-link-speed' >> * Changed 'nvidia,pex-wake' to 'nvidia,wake-gpios' >> * Removed .runtime_suspend() & .runtime_resume() implementations >> >> Changes since [v1]: >> * Made CONFIG_PCIE_TEGRA194 as 'm' by default from its previous 'y' state >> * Modified code as per changes made to DT documentation >> * Refactored code to address Bjorn & Thierry's review comments >> * Added goto to avoid recursion in tegra_pcie_dw_host_init() API >> * Merged .scan_bus() of dw_pcie_host_ops implementation to tegra_pcie_dw_host_init() API >> >> drivers/pci/controller/dwc/Kconfig | 10 + >> drivers/pci/controller/dwc/Makefile | 1 + >> drivers/pci/controller/dwc/pcie-tegra194.c | 1621 ++++++++++++++++++++ >> 3 files changed, 1632 insertions(+) >> create mode 100644 drivers/pci/controller/dwc/pcie-tegra194.c >> >> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig >> index a6ce1ee51b4c..884112afc11b 100644 >> --- a/drivers/pci/controller/dwc/Kconfig >> +++ b/drivers/pci/controller/dwc/Kconfig >> @@ -220,6 +220,16 @@ config PCI_MESON >> and therefore the driver re-uses the DesignWare core functions to >> implement the driver. >> >> +config PCIE_TEGRA194 >> + tristate "NVIDIA Tegra194 (and later) PCIe controller" >> + depends on (TEGRA_BPMP && ARCH_TEGRA) || COMPILE_TEST > > TEGRA_BPMP will be enough here as it depends on other relevant options. > > Hence I mean: > > depends on TEGRA_BPMP || COMPILE_TEST Maybe it's worth to even change TEGRA_BPMP to ARCH_TEGRA_194_SOC. Although then you'll have to extend it with other platforms later on, but probably that's fine. > >> + depends on PCI_MSI_IRQ_DOMAIN > > You probably want to s/depends on/select/ PCI_MSI_IRQ_DOMAIN, don't you? > I actually looked up the PCI_MSI_IRQ_DOMAIN and it is correct in your case, my bad.
On 6/6/2019 10:00 PM, Dmitry Osipenko wrote: > 26.05.2019 7:37, Vidya Sagar пишет: >> Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface >> with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module. >> For each PCIe lane of a controller, there is a P2U unit instantiated at >> hardware level. This driver provides support for the programming required >> for each P2U that is going to be used for a PCIe controller. >> >> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >> --- >> Changes since [v7]: >> * Changed P2U driver file name from pcie-p2u-tegra194.c to phy-tegra194-p2u.c >> >> Changes since [v6]: >> * None >> >> Changes since [v5]: >> * Addressed review comments from Thierry >> >> Changes since [v4]: >> * None >> >> Changes since [v3]: >> * Rebased on top of linux-next top of the tree >> >> Changes since [v2]: >> * Replaced spaces with tabs in Kconfig file >> * Sorted header file inclusion alphabetically >> >> Changes since [v1]: >> * Added COMPILE_TEST in Kconfig >> * Removed empty phy_ops implementations >> * Modified code according to DT documentation file modifications >> >> drivers/phy/tegra/Kconfig | 7 ++ >> drivers/phy/tegra/Makefile | 1 + >> drivers/phy/tegra/phy-tegra194-p2u.c | 109 +++++++++++++++++++++++++++ >> 3 files changed, 117 insertions(+) >> create mode 100644 drivers/phy/tegra/phy-tegra194-p2u.c >> >> diff --git a/drivers/phy/tegra/Kconfig b/drivers/phy/tegra/Kconfig >> index a3b1de953fb7..c56fc8452e03 100644 >> --- a/drivers/phy/tegra/Kconfig >> +++ b/drivers/phy/tegra/Kconfig >> @@ -6,3 +6,10 @@ config PHY_TEGRA_XUSB >> >> To compile this driver as a module, choose M here: the module will >> be called phy-tegra-xusb. >> + >> +config PHY_TEGRA194_P2U >> + tristate "NVIDIA Tegra194 PIPE2UPHY PHY driver" >> + depends on ARCH_TEGRA || COMPILE_TEST > > ARCH_TEGRA is a bit too much, ARCH_TEGRA_194_SOC should fit better here. > Ok. I'll take care of it in the next patch series.
On 6/7/2019 12:22 AM, Dmitry Osipenko wrote: > 06.06.2019 19:35, Dmitry Osipenko пишет: >> 26.05.2019 7:37, Vidya Sagar пишет: >>> Add support for Synopsys DesignWare core IP based PCIe host controller >>> present in Tegra194 SoC. >>> >>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >>> --- >>> Changes since [v7]: >>> * Addressed review comments from Thierry >>> >>> Changes since [v6]: >>> * Removed code around "nvidia,disable-aspm-states" DT property >>> * Refactored code to remove code duplication >>> >>> Changes since [v5]: >>> * Addressed review comments from Thierry >>> >>> Changes since [v4]: >>> * None >>> >>> Changes since [v3]: >>> * None >>> >>> Changes since [v2]: >>> * Changed 'nvidia,init-speed' to 'nvidia,init-link-speed' >>> * Changed 'nvidia,pex-wake' to 'nvidia,wake-gpios' >>> * Removed .runtime_suspend() & .runtime_resume() implementations >>> >>> Changes since [v1]: >>> * Made CONFIG_PCIE_TEGRA194 as 'm' by default from its previous 'y' state >>> * Modified code as per changes made to DT documentation >>> * Refactored code to address Bjorn & Thierry's review comments >>> * Added goto to avoid recursion in tegra_pcie_dw_host_init() API >>> * Merged .scan_bus() of dw_pcie_host_ops implementation to tegra_pcie_dw_host_init() API >>> >>> drivers/pci/controller/dwc/Kconfig | 10 + >>> drivers/pci/controller/dwc/Makefile | 1 + >>> drivers/pci/controller/dwc/pcie-tegra194.c | 1621 ++++++++++++++++++++ >>> 3 files changed, 1632 insertions(+) >>> create mode 100644 drivers/pci/controller/dwc/pcie-tegra194.c >>> >>> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig >>> index a6ce1ee51b4c..884112afc11b 100644 >>> --- a/drivers/pci/controller/dwc/Kconfig >>> +++ b/drivers/pci/controller/dwc/Kconfig >>> @@ -220,6 +220,16 @@ config PCI_MESON >>> and therefore the driver re-uses the DesignWare core functions to >>> implement the driver. >>> >>> +config PCIE_TEGRA194 >>> + tristate "NVIDIA Tegra194 (and later) PCIe controller" >>> + depends on (TEGRA_BPMP && ARCH_TEGRA) || COMPILE_TEST >> >> TEGRA_BPMP will be enough here as it depends on other relevant options. >> >> Hence I mean: >> >> depends on TEGRA_BPMP || COMPILE_TEST > > Maybe it's worth to even change TEGRA_BPMP to ARCH_TEGRA_194_SOC. > Although then you'll have to extend it with other platforms later on, > but probably that's fine. I received an explicit comment previously to make this dependent on TEGRA_BPMP as the driver is using APIs to get certain jobs done by BPMP-FW. But, since we can't boot kernel in the first place without having BPMP-FW in place, I think it should be fine to make it dependent on ARCH_TEGRA_194_SOC directly. > >> >>> + depends on PCI_MSI_IRQ_DOMAIN >> >> You probably want to s/depends on/select/ PCI_MSI_IRQ_DOMAIN, don't you? >> > > I actually looked up the PCI_MSI_IRQ_DOMAIN and it is correct in your > case, my bad. >
07.06.2019 17:10, Vidya Sagar пишет: > On 6/7/2019 12:22 AM, Dmitry Osipenko wrote: >> 06.06.2019 19:35, Dmitry Osipenko пишет: >>> 26.05.2019 7:37, Vidya Sagar пишет: >>>> Add support for Synopsys DesignWare core IP based PCIe host controller >>>> present in Tegra194 SoC. >>>> >>>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >>>> --- >>>> Changes since [v7]: >>>> * Addressed review comments from Thierry >>>> >>>> Changes since [v6]: >>>> * Removed code around "nvidia,disable-aspm-states" DT property >>>> * Refactored code to remove code duplication >>>> >>>> Changes since [v5]: >>>> * Addressed review comments from Thierry >>>> >>>> Changes since [v4]: >>>> * None >>>> >>>> Changes since [v3]: >>>> * None >>>> >>>> Changes since [v2]: >>>> * Changed 'nvidia,init-speed' to 'nvidia,init-link-speed' >>>> * Changed 'nvidia,pex-wake' to 'nvidia,wake-gpios' >>>> * Removed .runtime_suspend() & .runtime_resume() implementations >>>> >>>> Changes since [v1]: >>>> * Made CONFIG_PCIE_TEGRA194 as 'm' by default from its previous 'y' >>>> state >>>> * Modified code as per changes made to DT documentation >>>> * Refactored code to address Bjorn & Thierry's review comments >>>> * Added goto to avoid recursion in tegra_pcie_dw_host_init() API >>>> * Merged .scan_bus() of dw_pcie_host_ops implementation to >>>> tegra_pcie_dw_host_init() API >>>> >>>> drivers/pci/controller/dwc/Kconfig | 10 + >>>> drivers/pci/controller/dwc/Makefile | 1 + >>>> drivers/pci/controller/dwc/pcie-tegra194.c | 1621 >>>> ++++++++++++++++++++ >>>> 3 files changed, 1632 insertions(+) >>>> create mode 100644 drivers/pci/controller/dwc/pcie-tegra194.c >>>> >>>> diff --git a/drivers/pci/controller/dwc/Kconfig >>>> b/drivers/pci/controller/dwc/Kconfig >>>> index a6ce1ee51b4c..884112afc11b 100644 >>>> --- a/drivers/pci/controller/dwc/Kconfig >>>> +++ b/drivers/pci/controller/dwc/Kconfig >>>> @@ -220,6 +220,16 @@ config PCI_MESON >>>> and therefore the driver re-uses the DesignWare core >>>> functions to >>>> implement the driver. >>>> +config PCIE_TEGRA194 >>>> + tristate "NVIDIA Tegra194 (and later) PCIe controller" >>>> + depends on (TEGRA_BPMP && ARCH_TEGRA) || COMPILE_TEST >>> >>> TEGRA_BPMP will be enough here as it depends on other relevant options. >>> >>> Hence I mean: >>> >>> depends on TEGRA_BPMP || COMPILE_TEST >> >> Maybe it's worth to even change TEGRA_BPMP to ARCH_TEGRA_194_SOC. >> Although then you'll have to extend it with other platforms later on, >> but probably that's fine. > I received an explicit comment previously to make this dependent on > TEGRA_BPMP > as the driver is using APIs to get certain jobs done by BPMP-FW. But, since > we can't boot kernel in the first place without having BPMP-FW in place, > I think > it should be fine to make it dependent on ARCH_TEGRA_194_SOC directly. ARCH_TEGRA_194_SOC selects BPMP by itself (see drivers/soc/tegra/Kconfig), so it's indeed absolutely fine.