| Message ID | 20190506234631.113226-3-chris.brandt@renesas.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | usb: Add host and device support for RZ/A2 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
On Mon, May 6, 2019 at 6:47 PM Chris Brandt <chris.brandt@renesas.com> wrote: > > Document the optional renesas,uses_usb_x1 property. > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > --- > Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt > index d46188f450bf..26bf377102d3 100644 > --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt > +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt > @@ -46,6 +46,8 @@ channel as USB OTG: > regulator will be managed during the PHY power on/off sequence. > - renesas,no-otg-pins: boolean, specify when a board does not provide proper > otg pins. > +- renesas,use_usb_x1: boolean, the dedicated 48MHz crystal inputs USB_X1 are > + used for the PLL source s/_/-/
On Mon, May 06, 2019, Rob Herring wrote: > > +- renesas,use_usb_x1: boolean, the dedicated 48MHz crystal inputs > USB_X1 are > > + used for the PLL source > > s/_/-/ Good point. Thanks. Chris
Hello! On 07.05.2019 2:46, Chris Brandt wrote: > Document the optional renesas,uses_usb_x1 property. > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > --- > Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt > index d46188f450bf..26bf377102d3 100644 > --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt > +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt > @@ -46,6 +46,8 @@ channel as USB OTG: > regulator will be managed during the PHY power on/off sequence. > - renesas,no-otg-pins: boolean, specify when a board does not provide proper > otg pins. > +- renesas,use_usb_x1: boolean, the dedicated 48MHz crystal inputs USB_X1 are Hyphens are preferred to underscores in the DT property names. > + used for the PLL source > > Example (R-Car H3): MBR, Sergei
diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt index d46188f450bf..26bf377102d3 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt @@ -46,6 +46,8 @@ channel as USB OTG: regulator will be managed during the PHY power on/off sequence. - renesas,no-otg-pins: boolean, specify when a board does not provide proper otg pins. +- renesas,use_usb_x1: boolean, the dedicated 48MHz crystal inputs USB_X1 are + used for the PLL source Example (R-Car H3):
Document the optional renesas,uses_usb_x1 property. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++ 1 file changed, 2 insertions(+)