Message ID | 20190430103056.32537-14-peng.fan@nxp.com |
---|---|
State | Superseded |
Delegated to: | Stefano Babic |
Headers | show |
Series | i.MX8MM + CCF | expand |
On Tue, 30 Apr 2019 10:18:15 +0000 Peng Fan <peng.fan@nxp.com> wrote: > Import some clk helpers from Linux Kernel for i.MX8MM usage > Please globally provide SHA1 and tag of ported code from Linux kernel. > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > drivers/clk/imx/clk.h | 81 > +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, > 81 insertions(+) > > diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h > index 864a215a22..aa6e81ff13 100644 > --- a/drivers/clk/imx/clk.h > +++ b/drivers/clk/imx/clk.h > @@ -42,6 +42,23 @@ static inline struct clk *imx_clk_gate2(const char > *name, const char *parent, shift, 0x3, 0); > } > > +static inline struct clk *imx_clk_gate4(const char *name, const char > *parent, > + void __iomem *reg, u8 shift) > +{ > + return clk_register_gate2(NULL, name, parent, > + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, > + reg, shift, 0x3, 0); > +} > + > +static inline struct clk *imx_clk_gate4_flags(const char *name, > + const char *parent, void __iomem *reg, u8 shift, > + unsigned long flags) > +{ > + return clk_register_gate2(NULL, name, parent, > + flags | CLK_SET_RATE_PARENT | > CLK_OPS_PARENT_ENABLE, > + reg, shift, 0x3, 0); > +} > + > static inline struct clk *imx_clk_fixed_factor(const char *name, > const char *parent, unsigned int mult, unsigned int > div) { > @@ -56,6 +73,14 @@ static inline struct clk *imx_clk_divider(const > char *name, const char *parent, reg, shift, width, 0); > } > > +static inline struct clk *imx_clk_divider2(const char *name, const > char *parent, > + void __iomem *reg, u8 shift, u8 width) > +{ > + return clk_register_divider(NULL, name, parent, > + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, > + reg, shift, width, 0); > +} > + > struct clk *imx_clk_pfd(const char *name, const char *parent_name, > void __iomem *reg, u8 idx); > > @@ -63,6 +88,16 @@ struct clk *imx_clk_fixup_mux(const char *name, > void __iomem *reg, u8 shift, u8 width, const char * const *parents, > int num_parents, void (*fixup)(u32 > *val)); > +static inline struct clk *imx_clk_mux_flags(const char *name, > + void __iomem *reg, u8 shift, u8 width, > + const char * const *parents, int num_parents, > + unsigned long flags) > +{ > + return clk_register_mux(NULL, name, parents, num_parents, > + flags | CLK_SET_RATE_NO_REPARENT, > reg, shift, > + width, 0); > +} > + > static inline struct clk *imx_clk_mux(const char *name, void __iomem > *reg, u8 shift, u8 width, const char * const *parents, > int num_parents) > @@ -72,4 +107,50 @@ static inline struct clk *imx_clk_mux(const char > *name, void __iomem *reg, width, 0); > } > > +static inline struct clk *imx_clk_mux2(const char *name, void > __iomem *reg, > + u8 shift, u8 width, const char * const > *parents, > + int num_parents) > +{ > + return clk_register_mux(NULL, name, parents, num_parents, > + CLK_SET_RATE_NO_REPARENT | > CLK_OPS_PARENT_ENABLE, > + reg, shift, width, 0); > +} > + > +static inline struct clk *imx_clk_gate(const char *name, const char > *parent, > + void __iomem *reg, u8 shift) > +{ > + return clk_register_gate(NULL, name, parent, > CLK_SET_RATE_PARENT, reg, > + shift, 0, NULL); > +} > + > +static inline struct clk *imx_clk_gate_flags(const char *name, const > char *parent, > + void __iomem *reg, u8 shift, unsigned long flags) > +{ > + return clk_register_gate(NULL, name, parent, flags | > CLK_SET_RATE_PARENT, reg, > + shift, 0, NULL); > +} > + > +static inline struct clk *imx_clk_gate3(const char *name, const char > *parent, > + void __iomem *reg, u8 shift) > +{ > + return clk_register_gate(NULL, name, parent, > + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, > + reg, shift, 0, NULL); > +} > + > +struct clk *imx8m_clk_composite_flags(const char *name, > + const char * const *parent_names, > + int num_parents, void __iomem *reg, unsigned long > flags); + > +#define __imx8m_clk_composite(name, parent_names, reg, flags) \ > + imx8m_clk_composite_flags(name, parent_names, \ > + ARRAY_SIZE(parent_names), reg, \ > + flags | CLK_SET_RATE_NO_REPARENT | > CLK_OPS_PARENT_ENABLE) + > +#define imx8m_clk_composite(name, parent_names, reg) \ > + __imx8m_clk_composite(name, parent_names, reg, 0) > + > +#define imx8m_clk_composite_critical(name, parent_names, reg) \ > + __imx8m_clk_composite(name, parent_names, reg, > CLK_IS_CRITICAL) + > #endif /* __MACH_IMX_CLK_H */ Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 864a215a22..aa6e81ff13 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -42,6 +42,23 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent, shift, 0x3, 0); } +static inline struct clk *imx_clk_gate4(const char *name, const char *parent, + void __iomem *reg, u8 shift) +{ + return clk_register_gate2(NULL, name, parent, + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + reg, shift, 0x3, 0); +} + +static inline struct clk *imx_clk_gate4_flags(const char *name, + const char *parent, void __iomem *reg, u8 shift, + unsigned long flags) +{ + return clk_register_gate2(NULL, name, parent, + flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + reg, shift, 0x3, 0); +} + static inline struct clk *imx_clk_fixed_factor(const char *name, const char *parent, unsigned int mult, unsigned int div) { @@ -56,6 +73,14 @@ static inline struct clk *imx_clk_divider(const char *name, const char *parent, reg, shift, width, 0); } +static inline struct clk *imx_clk_divider2(const char *name, const char *parent, + void __iomem *reg, u8 shift, u8 width) +{ + return clk_register_divider(NULL, name, parent, + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + reg, shift, width, 0); +} + struct clk *imx_clk_pfd(const char *name, const char *parent_name, void __iomem *reg, u8 idx); @@ -63,6 +88,16 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents, void (*fixup)(u32 *val)); +static inline struct clk *imx_clk_mux_flags(const char *name, + void __iomem *reg, u8 shift, u8 width, + const char * const *parents, int num_parents, + unsigned long flags) +{ + return clk_register_mux(NULL, name, parents, num_parents, + flags | CLK_SET_RATE_NO_REPARENT, reg, shift, + width, 0); +} + static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents) @@ -72,4 +107,50 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, width, 0); } +static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, + u8 shift, u8 width, const char * const *parents, + int num_parents) +{ + return clk_register_mux(NULL, name, parents, num_parents, + CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE, + reg, shift, width, 0); +} + +static inline struct clk *imx_clk_gate(const char *name, const char *parent, + void __iomem *reg, u8 shift) +{ + return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, + shift, 0, NULL); +} + +static inline struct clk *imx_clk_gate_flags(const char *name, const char *parent, + void __iomem *reg, u8 shift, unsigned long flags) +{ + return clk_register_gate(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg, + shift, 0, NULL); +} + +static inline struct clk *imx_clk_gate3(const char *name, const char *parent, + void __iomem *reg, u8 shift) +{ + return clk_register_gate(NULL, name, parent, + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + reg, shift, 0, NULL); +} + +struct clk *imx8m_clk_composite_flags(const char *name, + const char * const *parent_names, + int num_parents, void __iomem *reg, unsigned long flags); + +#define __imx8m_clk_composite(name, parent_names, reg, flags) \ + imx8m_clk_composite_flags(name, parent_names, \ + ARRAY_SIZE(parent_names), reg, \ + flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE) + +#define imx8m_clk_composite(name, parent_names, reg) \ + __imx8m_clk_composite(name, parent_names, reg, 0) + +#define imx8m_clk_composite_critical(name, parent_names, reg) \ + __imx8m_clk_composite(name, parent_names, reg, CLK_IS_CRITICAL) + #endif /* __MACH_IMX_CLK_H */
Import some clk helpers from Linux Kernel for i.MX8MM usage Signed-off-by: Peng Fan <peng.fan@nxp.com> --- drivers/clk/imx/clk.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+)