diff mbox

[U-Boot,v2,3/4] ftsdmc020: move ftsdmc020.h to include/faraday

Message ID 1300770080-9893-3-git-send-email-macpaul@andestech.com
State Superseded
Delegated to: Albert ARIBAUD
Headers show

Commit Message

Macpaul Lin March 22, 2011, 5:01 a.m. UTC 
Move the header file "ftsdmc020.h" (SDRAM Controller)
to "include/faraday" folder.

This change will let other SoC which also use ftsdmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
Changes for v2:
 - Fix the include path of ftsdmc020 for a320evb.
 - v1 of this patch /patch/71953/ in patchworks has been marked as 
superseded.

 arch/arm/include/asm/arch-a320/ftsdmc020.h | 
 103 ----------------------------
 board/faraday/a320evb/lowlevel_init.S      |    2 +-
 include/faraday/ftsdmc020.h                |  103 
++++++++++++++++++++++++++++
 3 files changed, 104 insertions(+), 104 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-a320/ftsdmc020.h
 create mode 100644 include/faraday/ftsdmc020.h

Comments

Albert ARIBAUD April 16, 2011, 5:04 a.m. UTC | #1 
Hi MacPaul Lin,

Le 22/03/2011 06:01, Macpaul Lin a écrit :
> Move the header file "ftsdmc020.h" (SDRAM Controller)
> to "include/faraday" folder.
>
> This change will let other SoC which also use ftsdmc020
> could share the same header file.
>
> Signed-off-by: Macpaul Lin<macpaul@andestech.com>
> ---
> Changes for v2:
>   - Fix the include path of ftsdmc020 for a320evb.
>   - v1 of this patch /patch/71953/ in patchworks has been marked as
> superseded.
>
>   arch/arm/include/asm/arch-a320/ftsdmc020.h |
>   103 ----------------------------
>   board/faraday/a320evb/lowlevel_init.S      |    2 +-
>   include/faraday/ftsdmc020.h                |  103
> ++++++++++++++++++++++++++++
>   3 files changed, 104 insertions(+), 104 deletions(-)
>   delete mode 100644 arch/arm/include/asm/arch-a320/ftsdmc020.h
>   create mode 100644 include/faraday/ftsdmc020.h

Please use git format-patch -M or -C to get the move actually shown in 
the patch as a rename rather than as a delete+create.

Amicalement,
Macpaul Lin April 16, 2011, 6:43 a.m. UTC | #2 
Hi Albert,

2011/4/16 Albert ARIBAUD <albert.u.boot@aribaud.net>:
> Hi MacPaul Lin,
>
>>   3 files changed, 104 insertions(+), 104 deletions(-)
>>   delete mode 100644 arch/arm/include/asm/arch-a320/ftsdmc020.h
>>   create mode 100644 include/faraday/ftsdmc020.h
>
> Please use git format-patch -M or -C to get the move actually shown in
> the patch as a rename rather than as a delete+create.
>

Thanks for your tip of -M or -C options.
Should I resend these two patches? Or you have already applied them
into arm's master?
Albert ARIBAUD April 16, 2011, 6:50 a.m. UTC | #3 
Hi Macpaul Lin,

Le 16/04/2011 08:43, Macpaul Lin a écrit :
> Hi Albert,
>
> 2011/4/16 Albert ARIBAUD<albert.u.boot@aribaud.net>:
>> Hi MacPaul Lin,
>>
>>>    3 files changed, 104 insertions(+), 104 deletions(-)
>>>    delete mode 100644 arch/arm/include/asm/arch-a320/ftsdmc020.h
>>>    create mode 100644 include/faraday/ftsdmc020.h
>>
>> Please use git format-patch -M or -C to get the move actually shown in
>> the patch as a rename rather than as a delete+create.
>>
>
> Thanks for your tip of -M or -C options.
> Should I resend these two patches? Or you have already applied them
> into arm's master?

Please resend a V3 patch set of the four patches, even if two of them 
are unchanged. Make sure all patches have their history updated, even 
the unchanged patches ('V3: no change'). I'll apply the whole set in one go.

Amicalement,
Macpaul Lin April 21, 2011, 2:57 a.m. UTC | #4 
HI Albert,

2011/4/16 Albert ARIBAUD <albert.u.boot@aribaud.net>:
> Please resend a V3 patch set of the four patches, even if two of them are
> unchanged. Make sure all patches have their history updated, even the
> unchanged patches ('V3: no change'). I'll apply the whole set in one go.
>
> Amicalement,
> --
> Albert.
>

Patch v3 of this set of patches has been send on 2011-04-16

Please refer to
http://patchwork.ozlabs.org/patch/91478/
http://patchwork.ozlabs.org/patch/91479/
http://patchwork.ozlabs.org/patch/91476/
http://patchwork.ozlabs.org/patch/91477/

Thanks.
Albert ARIBAUD April 21, 2011, 11:35 a.m. UTC | #5 
Hi MacPaul,

Le 21/04/2011 04:57, Macpaul Lin a écrit :
> HI Albert,
>
> 2011/4/16 Albert ARIBAUD<albert.u.boot@aribaud.net>:
>> Please resend a V3 patch set of the four patches, even if two of them are
>> unchanged. Make sure all patches have their history updated, even the
>> unchanged patches ('V3: no change'). I'll apply the whole set in one go.
>>
>> Amicalement,
>> --
>> Albert.
>>
>
> Patch v3 of this set of patches has been send on 2011-04-16
>
> Please refer to
> http://patchwork.ozlabs.org/patch/91478/
> http://patchwork.ozlabs.org/patch/91479/
> http://patchwork.ozlabs.org/patch/91476/
> http://patchwork.ozlabs.org/patch/91477/

91476 and 91477 are ok, I'll apply them.

91478 and 91479, though, I don't see their point: they are adding a file 
that obviously no one used before it was added, but that no one uses 
now. These header files are dead code, and should only be added in a 
patch where other code changes actually make them required.

Amicalement,
Macpaul Lin April 21, 2011, 11:53 a.m. UTC | #6 
Hi Albert,

2011/4/21 Albert ARIBAUD <albert.u.boot@aribaud.net>:
> 91478 and 91479, though, I don't see their point: they are adding a file
> that obviously no one used before it was added, but that no one uses now.
> These header files are dead code, and should only be added in a patch where
> other code changes actually make them required.
>
> Amicalement,
> --
> Albert.
>

Roger that.
I'll resend this later with the SoC which used it is under reviewing.
Thanks.
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-a320/ftsdmc020.h 
b/arch/arm/include/asm/arch-a320/ftsdmc020.h
deleted file mode 100644
index 0699772..0000000
--- a/arch/arm/include/asm/arch-a320/ftsdmc020.h
+++ /dev/null
@@ -1,103 +0,0 @@ 
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * SDRAM Controller
- */
-#ifndef __FTSDMC020_H
-#define __FTSDMC020_H
-
-#define FTSDMC020_OFFSET_TP0		0x00
-#define FTSDMC020_OFFSET_TP1		0x04
-#define FTSDMC020_OFFSET_CR		0x08
-#define FTSDMC020_OFFSET_BANK0_BSR	0x0C
-#define FTSDMC020_OFFSET_BANK1_BSR	0x10
-#define FTSDMC020_OFFSET_BANK2_BSR	0x14
-#define FTSDMC020_OFFSET_BANK3_BSR	0x18
-#define FTSDMC020_OFFSET_BANK4_BSR	0x1C
-#define FTSDMC020_OFFSET_BANK5_BSR	0x20
-#define FTSDMC020_OFFSET_BANK6_BSR	0x24
-#define FTSDMC020_OFFSET_BANK7_BSR	0x28
-#define FTSDMC020_OFFSET_ACR		0x34
-
-/*
- * Timing Parametet 0 Register
- */
-#define FTSDMC020_TP0_TCL(x)	((x) & 0x3)
-#define FTSDMC020_TP0_TWR(x)	(((x) & 0x3) << 4)
-#define FTSDMC020_TP0_TRF(x)	(((x) & 0xf) << 8)
-#define FTSDMC020_TP0_TRCD(x)	(((x) & 0x7) << 12)
-#define FTSDMC020_TP0_TRP(x)	(((x) & 0xf) << 16)
-#define FTSDMC020_TP0_TRAS(x)	(((x) & 0xf) << 20)
-
-/*
- * Timing Parametet 1 Register
- */
-#define FTSDMC020_TP1_REF_INTV(x)	((x) & 0xffff)
-#define FTSDMC020_TP1_INI_REFT(x)	(((x) & 0xf) << 16)
-#define FTSDMC020_TP1_INI_PREC(x)	(((x) & 0xf) << 20)
-
-/*
- * Configuration Register
- */
-#define FTSDMC020_CR_SREF	(1 << 0)
-#define FTSDMC020_CR_PWDN	(1 << 1)
-#define FTSDMC020_CR_ISMR	(1 << 2)
-#define FTSDMC020_CR_IREF	(1 << 3)
-#define FTSDMC020_CR_IPREC	(1 << 4)
-#define FTSDMC020_CR_REFTYPE	(1 << 5)
-
-/*
- * SDRAM External Bank Base/Size Register
- */
-#define FTSDMC020_BANK_ENABLE		(1 << 28)
-
-#define FTSDMC020_BANK_BASE(addr)	(((addr) >> 20) << 16)
-
-#define FTSDMC020_BANK_DDW_X4		(0 << 12)
-#define FTSDMC020_BANK_DDW_X8		(1 << 12)
-#define FTSDMC020_BANK_DDW_X16		(2 << 12)
-#define FTSDMC020_BANK_DDW_X32		(3 << 12)
-
-#define FTSDMC020_BANK_DSZ_16M		(0 << 8)
-#define FTSDMC020_BANK_DSZ_64M		(1 << 8)
-#define FTSDMC020_BANK_DSZ_128M		(2 << 8)
-#define FTSDMC020_BANK_DSZ_256M		(3 << 8)
-
-#define FTSDMC020_BANK_MBW_8		(0 << 4)
-#define FTSDMC020_BANK_MBW_16		(1 << 4)
-#define FTSDMC020_BANK_MBW_32		(2 << 4)
-
-#define FTSDMC020_BANK_SIZE_1M		0x0
-#define FTSDMC020_BANK_SIZE_2M		0x1
-#define FTSDMC020_BANK_SIZE_4M		0x2
-#define FTSDMC020_BANK_SIZE_8M		0x3
-#define FTSDMC020_BANK_SIZE_16M		0x4
-#define FTSDMC020_BANK_SIZE_32M		0x5
-#define FTSDMC020_BANK_SIZE_64M		0x6
-#define FTSDMC020_BANK_SIZE_128M	0x7
-#define FTSDMC020_BANK_SIZE_256M	0x8
-
-/*
- * Arbiter Control Register
- */
-#define FTSDMC020_ACR_TOC(x)	((x) & 0x1f)
-#define FTSDMC020_ACR_TOE	(1 << 8)
-
-#endif	/* __FTSDMC020_H */
diff --git a/board/faraday/a320evb/lowlevel_init.S 
b/board/faraday/a320evb/lowlevel_init.S
index 97718c0..4262c11 100644
--- a/board/faraday/a320evb/lowlevel_init.S
+++ b/board/faraday/a320evb/lowlevel_init.S
@@ -21,7 +21,7 @@ 
 #include <version.h>

 #include <asm/macro.h>
-#include <asm/arch/ftsdmc020.h>
+#include <faraday/ftsdmc020.h>

 /*
  * parameters for the SDRAM controller
diff --git a/include/faraday/ftsdmc020.h b/include/faraday/ftsdmc020.h
new file mode 100644
index 0000000..0699772
--- /dev/null
+++ b/include/faraday/ftsdmc020.h
@@ -0,0 +1,103 @@ 
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratbert@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * SDRAM Controller
+ */
+#ifndef __FTSDMC020_H
+#define __FTSDMC020_H
+
+#define FTSDMC020_OFFSET_TP0		0x00
+#define FTSDMC020_OFFSET_TP1		0x04
+#define FTSDMC020_OFFSET_CR		0x08
+#define FTSDMC020_OFFSET_BANK0_BSR	0x0C
+#define FTSDMC020_OFFSET_BANK1_BSR	0x10
+#define FTSDMC020_OFFSET_BANK2_BSR	0x14
+#define FTSDMC020_OFFSET_BANK3_BSR	0x18
+#define FTSDMC020_OFFSET_BANK4_BSR	0x1C
+#define FTSDMC020_OFFSET_BANK5_BSR	0x20
+#define FTSDMC020_OFFSET_BANK6_BSR	0x24
+#define FTSDMC020_OFFSET_BANK7_BSR	0x28
+#define FTSDMC020_OFFSET_ACR		0x34
+
+/*
+ * Timing Parametet 0 Register
+ */
+#define FTSDMC020_TP0_TCL(x)	((x) & 0x3)
+#define FTSDMC020_TP0_TWR(x)	(((x) & 0x3) << 4)
+#define FTSDMC020_TP0_TRF(x)	(((x) & 0xf) << 8)
+#define FTSDMC020_TP0_TRCD(x)	(((x) & 0x7) << 12)
+#define FTSDMC020_TP0_TRP(x)	(((x) & 0xf) << 16)
+#define FTSDMC020_TP0_TRAS(x)	(((x) & 0xf) << 20)
+
+/*
+ * Timing Parametet 1 Register
+ */
+#define FTSDMC020_TP1_REF_INTV(x)	((x) & 0xffff)
+#define FTSDMC020_TP1_INI_REFT(x)	(((x) & 0xf) << 16)
+#define FTSDMC020_TP1_INI_PREC(x)	(((x) & 0xf) << 20)
+
+/*
+ * Configuration Register
+ */
+#define FTSDMC020_CR_SREF	(1 << 0)
+#define FTSDMC020_CR_PWDN	(1 << 1)
+#define FTSDMC020_CR_ISMR	(1 << 2)
+#define FTSDMC020_CR_IREF	(1 << 3)
+#define FTSDMC020_CR_IPREC	(1 << 4)
+#define FTSDMC020_CR_REFTYPE	(1 << 5)
+
+/*
+ * SDRAM External Bank Base/Size Register
+ */
+#define FTSDMC020_BANK_ENABLE		(1 << 28)
+
+#define FTSDMC020_BANK_BASE(addr)	(((addr) >> 20) << 16)
+
+#define FTSDMC020_BANK_DDW_X4		(0 << 12)
+#define FTSDMC020_BANK_DDW_X8		(1 << 12)
+#define FTSDMC020_BANK_DDW_X16		(2 << 12)
+#define FTSDMC020_BANK_DDW_X32		(3 << 12)
+
+#define FTSDMC020_BANK_DSZ_16M		(0 << 8)
+#define FTSDMC020_BANK_DSZ_64M		(1 << 8)
+#define FTSDMC020_BANK_DSZ_128M		(2 << 8)
+#define FTSDMC020_BANK_DSZ_256M		(3 << 8)
+
+#define FTSDMC020_BANK_MBW_8		(0 << 4)
+#define FTSDMC020_BANK_MBW_16		(1 << 4)
+#define FTSDMC020_BANK_MBW_32		(2 << 4)
+
+#define FTSDMC020_BANK_SIZE_1M		0x0
+#define FTSDMC020_BANK_SIZE_2M		0x1
+#define FTSDMC020_BANK_SIZE_4M		0x2
+#define FTSDMC020_BANK_SIZE_8M		0x3
+#define FTSDMC020_BANK_SIZE_16M		0x4
+#define FTSDMC020_BANK_SIZE_32M		0x5
+#define FTSDMC020_BANK_SIZE_64M		0x6
+#define FTSDMC020_BANK_SIZE_128M	0x7
+#define FTSDMC020_BANK_SIZE_256M	0x8
+
+/*
+ * Arbiter Control Register
+ */
+#define FTSDMC020_ACR_TOC(x)	((x) & 0x1f)
+#define FTSDMC020_ACR_TOE	(1 << 8)
+
+#endif	/* __FTSDMC020_H */