| Message ID | 20190215115649.2553-1-rosysong@rosinson.com |
|---|---|
| State | Superseded |
| Delegated to: | Daniel Schwierzeck |
| Headers | show |
| Series | [U-Boot,1/3] drivers: ag7xxx: add support for qca956x-s17 | expand |
Am 15.02.19 um 12:56 schrieb Rosy Song: > Signed-off-by: Rosy Song <rosysong@rosinson.com> this should have some commit message explaining the error. In fact all of your commits should have some meaningful commit message. > --- > arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h > index 380f387a26..016679e0f8 100644 > --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h > +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h > @@ -551,7 +551,7 @@ > #define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT 0 > #define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK 0x1f > #define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT 5 > -#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x3fff > +#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x1fff > #define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT 18 > #define QCA956X_PLL_CPU_CONFIG1_NINT_MASK 0x1ff > > @@ -563,7 +563,7 @@ > #define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT 0 > #define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK 0x1f > #define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT 5 > -#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x3fff > +#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x1fff > #define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT 18 > #define QCA956X_PLL_DDR_CONFIG1_NINT_MASK 0x1ff > >
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h index 380f387a26..016679e0f8 100644 --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h @@ -551,7 +551,7 @@ #define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT 0 #define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK 0x1f #define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT 5 -#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x3fff +#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x1fff #define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT 18 #define QCA956X_PLL_CPU_CONFIG1_NINT_MASK 0x1ff @@ -563,7 +563,7 @@ #define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT 0 #define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK 0x1f #define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT 5 -#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x3fff +#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x1fff #define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT 18 #define QCA956X_PLL_DDR_CONFIG1_NINT_MASK 0x1ff
Signed-off-by: Rosy Song <rosysong@rosinson.com> --- arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)