| Message ID | 1298876234-28115-8-git-send-email-xiangfu@openmobilefree.net |
|---|---|
| State | Accepted, archived |
| Headers | show |
On 02/28/2011 03:57 PM, Xiangfu Liu wrote: > diff --git a/Makefile b/Makefile > index dc2e3d8..758daf2 100644 > --- a/Makefile > +++ b/Makefile > @@ -1093,6 +1093,19 @@ smdk6400_config : unconfig > @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk > > #======================================================================== > +# MIPS > +#======================================================================== > +######################################################################### > +## MIPS32 XBurst jz4740 > +######################################################################### > +qi_lb60_config : unconfig > + @mkdir -p $(obj)include > + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h > + @echo "Compile NAND boot image for QI LB60" > + @$(MKCONFIG) -a qi_lb60 mips xburst nanonote xburst > + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk > + > +#======================================================================== > # Nios > #======================================================================== (In PATCH v6 6/7) > diff --git a/boards.cfg b/boards.cfg > index 45c3102..cb8c6a0 100644 > --- a/boards.cfg > +++ b/boards.cfg > @@ -243,6 +243,7 @@ vct_platinumavc mips mips vct microna > vct_platinumavc_small mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE > vct_platinumavc_onenand mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND > vct_platinumavc_onenand_small mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE > +qi_lb60 mips mips > PCI5441 nios2 nios2 pci5441 psyent > PK1C20 nios2 nios2 pk1c20 psyent > EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260 You added targets with the same name to two places. In this case, boards.cfg will be used to configure qi_lb60. All MIPS targets can be configured through boards.cfg now, so please 1) remove $(TOPDIR)/ Makefile part, and 2) get 'qi_lb60' entry work as expected, instead.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 03/15/2011 11:16 AM, Shinya Kuribayashi wrote: > You added targets with the same name to two places. In this case, > boards.cfg will be used to configure qi_lb60. All MIPS targets can > be configured through boards.cfg now, so please 1) remove $(TOPDIR)/ > Makefile part, and 2) get 'qi_lb60' entry work as expected, instead. thanks for the info. fixed. send the patches later today - -- Best Regards Xiangfu Liu http://www.openmobilefree.net -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk2MWxQACgkQRRAEFRxkgLTE8ACgw1I/fOPkebQqzknd7uLqRzRn WlMAn277HMxQbepuRM2uArCns7hVodD8 =iibd -----END PGP SIGNATURE-----
diff --git a/MAKEALL b/MAKEALL index a732e6a..7297367 100755 --- a/MAKEALL +++ b/MAKEALL @@ -530,7 +530,9 @@ LIST_mips=" \ ## MIPS Systems (little endian) ######################################################################### -LIST_mips4kc_el="" +LIST_mips4kc_el=" \ + qi_lb60 +" LIST_mips5kc_el="" diff --git a/Makefile b/Makefile index dc2e3d8..758daf2 100644 --- a/Makefile +++ b/Makefile @@ -1093,6 +1093,19 @@ smdk6400_config : unconfig @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk #======================================================================== +# MIPS +#======================================================================== +######################################################################### +## MIPS32 XBurst jz4740 +######################################################################### +qi_lb60_config : unconfig + @mkdir -p $(obj)include + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h + @echo "Compile NAND boot image for QI LB60" + @$(MKCONFIG) -a qi_lb60 mips xburst nanonote xburst + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + +#======================================================================== # Nios #======================================================================== diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 271a290..c65a6d5 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -39,6 +39,21 @@ typedef struct global_data { bd_t *bd; unsigned long flags; +#if defined(CONFIG_JZSOC) + /* There are other clocks in the jz4740 */ + unsigned long cpu_clk; /* CPU core clock */ + unsigned long sys_clk; /* System bus clock */ + unsigned long per_clk; /* Peripheral bus clock */ + unsigned long mem_clk; /* Memory bus clock */ + unsigned long dev_clk; /* Device clock */ + unsigned long fb_base; /* base address of framebuffer */ + /* "static data" needed by most of timer.c */ + unsigned long timer_rate_hz; + unsigned long tbl; + unsigned long tbu; + unsigned long long timer_reset_value; + unsigned long lastinc; +#endif unsigned long baudrate; unsigned long have_console; /* serial_init() was called */ phys_size_t ram_size; /* RAM size */ diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index f317124..9115055 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -136,10 +136,18 @@ static int init_baudrate (void) * argument, and returns an integer return code, where 0 means * "continue" and != 0 means "fatal error, hang the system". */ + +#if defined(CONFIG_JZSOC) +extern int jzsoc_init(void); +#endif + typedef int (init_fnc_t) (void); init_fnc_t *init_sequence[] = { board_early_init_f, +#if defined(CONFIG_JZSOC) + jzsoc_init, /* init gpio/clocks/dram etc. */ +#endif timer_init, env_init, /* initialize environment */ #ifdef CONFIG_INCA_IP diff --git a/arch/mips/lib/time.c b/arch/mips/lib/time.c index 0e66441..653be6c 100644 --- a/arch/mips/lib/time.c +++ b/arch/mips/lib/time.c @@ -24,6 +24,7 @@ #include <common.h> #include <asm/mipsregs.h> +#ifndef CONFIG_JZSOC static unsigned long timestamp; /* how many counter cycles in a jiffy */ @@ -96,3 +97,4 @@ ulong get_tbclk(void) { return CONFIG_SYS_HZ; } +#endif